AM29LV160DB-90WCC Просмотр технического описания (PDF) - Advanced Micro Devices

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AM29LV160DB-90WCC

16 Megabit (2 M x 8-Bit/1 M x 16-Bit) CMOS 3.0 Volt-only Boot Sector Flash Memory

Advanced Micro Devices 

DATA SHEET

GENERAL DESCRIPTION

The Am29LV160D is a 16 Mbit, 3.0 Volt-only Flash

memory organized as 2,097,152 bytes or 1,048,576

words. The device is offered in 48-ball FBGA, 44-pin

SO, and 48-pin TSOP packages. The word-wide data

(x16) appears on DQ15–DQ0; the byte-wide (x8) data

appears on DQ7–DQ0. This device is designed to be

programmed in-system with the standard system 3.0

volt VCC supply. A 12.0 V VPP or 5.0 VCC are not re-

quired for write or erase operations. The device can

also be programmed in standard

EPROM programmers.

The device offers access times of 70, 90, and 120 ns,

allowing high speed microprocessors to operate with-

out wait states. To eliminate bus contention the device

has separate chip enable (CE#), write enable (WE#)

and output enable (OE#) controls.

The device requires only a single 3.0 volt power sup-

ply for both read and write functions. Internally

generated and regulated voltages are provided for the

program and erase operations.

The Am29LV160D is entirely command set compatible

with the JEDEC single-power-supply Flash stan-

dard. Commands are written to the command register

using standard microprocessor write timings. Register

contents serve as input to an internal state-machine

that controls the erase and programming circuitry.

Write cycles also internally latch addresses and data

needed for the programming and erase operations.

Reading data out of the device is similar to reading

from other Flash or EPROM devices.

Device programming occurs by executing the program

command sequence. This initiates the Embedded

Program algorithm—an internal algorithm that auto-

matically times the program pulse widths and verifies

proper cell margin. The Unlock Bypass mode facili-

tates faster programming times by requiring only two

write cycles to program data instead of four.

Device erasure occurs by executing the erase com-

mand sequence. This initiates the Embedded Erase

algorithm—an internal algorithm that automatically

preprograms the array (if it is not already programmed)

before executing the erase operation. During erase,

the device automatically times the erase pulse widths

and verifies proper cell margin.

The host system can detect whether a program or

erase operation is complete by observing the RY/BY#

pin, or by reading the DQ7 (Data# Polling) and DQ6

(toggle) status bits. After a program or erase cycle

has been completed, the device is ready to read array

data or accept another command.

The sector erase architecture allows memory sec-

tors to be erased and reprogrammed without affecting

the data contents of other sectors. The device is fully

erased when shipped from the factory.

Hardware data protection measures include a low

VCC detector that automatically inhibits write opera-

tions during power transitions. The hardware sector

protection feature disables both program and erase

operations in any combination of the sectors of mem-

o r y. T h i s c a n b e a c h i eve d i n - s y s t e m o r v i a

programming equipment.

The Erase Suspend/Erase Resume feature enables

the user to put erase on hold for any period of time to

read data from, or program data to, any sector that is

not selected for erasure. True background erase can

thus be achieved.

The hardware RESET# pin terminates any operation

in progress and resets the internal state machine to

reading array data. The RESET# pin may be tied to

the system reset circuitry. A system reset would thus

also reset the device, enabling the system micropro-

cessor to read the boot-up firmware from the Flash

memory.

The device offers two power-saving features. When

addresses have been stable for a specified amount of

time, the device enters the automatic sleep mode.

The system can also place the device into the

standby mode. Power consumption is greatly re-

duced in both these modes.

AMD’s Flash technology combines years of Flash

memory manufacturing experience to produce the

highest levels of quality, reliability and cost effective-

ness. The device electrically erases all bits within a

sector simultaneously via Fowler-Nordheim tunnel-

ing. The data is programmed using hot electron

injection.

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Am29LV160D

May 5, 2006 22358B7

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