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MWS5101ELS Просмотр технического описания (PDF) - Intersil
Номер в каталоге
Компоненты Описание
производитель
MWS5101ELS
256-Word x 4-Bit LSI Static RAM
Intersil
MWS5101ELS Datasheet PDF : 7 Pages
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7
MWS5101, MWS5101A
A0 - A7
CHIP SELECT 1
CHIP SELECT 2
OUTPUT DISABLE
READ/WRITE
DATA OUT
t
RC
t
DOA1
t
DOA2
t
DOA3
t
DOH1
t
DOH2
t
DOH3
t
AA
HIGH
IMPEDANCE
DATA OUT
VALID
FIGURE 1. READ CYCLE TIMING WAVEFORMS
HIGH
IMPEDANCE
A0-A7
CHIP SELECT 1
t
CS1S
t
WC
t
WR
t
CS1H
CHIP SELECT 2
OUTPUT DISABLE
DI1-DI4
t
CS2S
t
CS2H
(NOTE)
t
ODS
t
DS
t
DH
DATA IN STABLE
READ/WRITE
t
WRW
t
AS
DON’T CARE
NOTE: t
ODS
is required for common I/O operation only; for separate I/O operations, output disable is “don’t care”.
FIGURE 2. WRITE CYCLE TIME WAVEFORMS
6-60
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