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ADUM7440ARQZ(Rev0) Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге
Компоненты Описание
производитель
ADUM7440ARQZ
(Rev.:Rev0)
ADI
Analog Devices ADI
ADUM7440ARQZ Datasheet PDF : 20 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADuM7440/ADuM7441/ADuM7442
ELECTRICAL CHARACTERISTICS—3.3 V OPERATION
All typical specifications are at TA = 25°C, VDD1 = VDD2 = 3.3 V. Minimum/maximum specifications apply over the entire recommended
operation range of 3.0 V ≤ VDD1 ≤ 3.6 V, 3.0 V ≤ VDD2 ≤ 3.6 V; and −40°C ≤ TA ≤ +105°C, unless otherwise noted. Switching specifications
are tested with CL = 15 pF and CMOS signal levels, unless otherwise noted.
Table 4.
Parameter
Symbol
SWITCHING SPECIFICATIONS
Data Rate
Propagation Delay
Pulse Width Distortion
tPHL, tPLH
PWD
Change vs. Temperature
Pulse Width
PW
Propagation Delay Skew
tPSK
Channel Matching
Codirectional
tPSKCD
Opposing-Direction
tPSKOD
Jitter
7 Codirectional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on the same side of the isolation barrier. Opposing-directional channel matching is the absolute value of the difference in propagation delays between any two channels with inputs on opposing sides of the isolation barrier.
A Grade
Min Typ Max
1
50 75
10 25
5
250
40
40
40
2
Table 5.
Parameter
SUPPLY CURRENT
ADuM7440
ADuM7441
ADuM7442
Symbol
IDD1
IDD2
IDD1
IDD2
IDD1
IDD2
1 Mbps—A, C Grades
Min
Typ
Max
3.0
3.8
1.8
2.3
2.8
3.5
2.5
3.3
2.2
2.7
2.2
2.8
C Grade
Min Typ Max Unit
Test Conditions
25
Mbps Within PWD limit
33
51 60
ns
50% input to 50% output
2
5
ns
|tPLH − tPHL|
3
ps/°C
40
ns
Within PWD limit
25
ns
Between any two units
3
5
ns
4
7
ns
2
ns
25 Mbps—C Grade
Min
Typ
Max
Unit
Test Conditions
20
28
mA
4.0
5.0
mA
14
20
mA
5.5
7.5
mA
10
13
mA
8.4
11
mA
Table 6. For All Models
Parameter
Symbol Min
Typ
Max
Unit
Test Conditions
DC SPECIFICATIONS
Logic High Input Threshold
VIH
0.7 VDDx
V
Logic Low Input Threshold
VIL
0.3 VDDx V
Logic High Output Voltages
VOH
VDDx − 0.2 3.3
VDDx − 0.4
3.1
V
IOx = −20 μA, VIx = VIxH
V
IOx = −4 mA, VIx = VIxH
Logic Low Output Voltages
VOL
0.0
0.1
V
0.2
0.4
V
IOx = 20 μA, VIx = VIxL
IOx = 4 mA, VIx = VIxL
Input Current per Channel
II
−10
+0.01 +10
μA
0 V ≤ VI x ≤ VDDx
Supply Current per Channel
Quiescent Input Supply Current
IDDI(Q)
0.50
mA
Quiescent Output Supply Current
IDDO(Q)
0.41
mA
Dynamic Input Supply Current
IDDI(D)
0.18
mA/Mbps
Dynamic Output Supply Current
IDDO(D)
0.02
mA/Mbps
AC SPECIFICATIONS
Output Rise/Fall Time
tR/tF
2.8
Common-Mode Transient Immunity1
|CM|
15
20
ns
kV/μs
10% to 90%
VIx = VDDx, VCM = 1000 V,
transient magnitude = 800 V
Refresh Rate
fr
1.1
Mbps
1 |CM| is the maximum common-mode voltage slew rate that can be sustained while maintaining VO > 0.8 VDD. The common-mode voltage slew rates apply to both
rising and falling common-mode voltage edges.
Rev. 0 | Page 4 of 20

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