ADV7177KS Просмотр технического описания (PDF) - Analog Devices

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ADV7177KS

Integrated Digital CCIR-601 to PAL/NTSC Video Encoder

Analog Devices 

ADV7177/ADV7178

Mode 3: Master/Slave Option HSYNC, BLANK, FIELD

(Timing Register 0 TR0 = X X X X X 1 1 0 or X X X X X 1 1 1)

In this mode, the ADV7177/ADV7178 accepts or generates Horizontal SYNC and Odd/Even FIELD signals. A transition of the

FIELD input when HSYNC is high indicates a new frame, i.e., vertical retrace. The BLANK signal is optional. When the BLANK

input is disabled, the ADV7177/ADV7178 automatically blanks all normally blank lines as per CCIR-624. Mode 3 is illustrated in

Figure 25 (NTSC) and Figure 26 (PAL).

DISPLAY

VERTICAL BLANK

DISPLAY

522 523 524 525

1

2

3

4

5

6

7

8

9

10

11

HSYNC

BLANK

FIELD

EVEN FIELD ODD FIELD

DISPLAY

VERTICAL BLANK

20

21

22

DISPLAY

260 261 262 263 264 265 266 267 268 269 270 271 272 273 274

HSYNC

BLANK

FIELD

ODD FIELD EVEN FIELD

Figure 25. Timing Mode 3 (NTSC)

283 284 285

DISPLAY

VERTICAL BLANK

DISPLAY

622

623

624

625

1

2

3

4

5

6

7

HSYNC

BLANK

FIELD

EVEN FIELD ODD FIELD

DISPLAY

VERTICAL BLANK

21

22

23

DISPLAY

309

310

311

312

313

314

315

316

317

318

319

320

HSYNC

BLANK

FIELD

EVEN FIELD ODD FIELD

Figure 26. Timing Mode 3 (PAL)

334

335

336

–20–

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