ADV7173KST Просмотр технического описания (PDF) - Analog Devices
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ADV7173KST Datasheet PDF : 60 Pages
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ADV7172/ADV7173
FUNCTIONAL BLOCK DIAGRAM
CLOCK PAL NTSC CSO_HSO VSO CLAMP SCLOCK SDATA ALSB
HSYNC
FIELD/
VSYNC
BLANK
RESET
T TX
TTXREQ
VAA
P0
COLOR
DATA
P7
VIDEO TIMING
GENERATOR
I2C MPU PORT
TELETEXT
INSERTION BLOCK
BRIGHTNESS AND
LUMA
CONTRAST CONTROL
+
10
PROGRAMMABLE
FILTER
8
Y8
ADD SYNC
+
+
SHARPNESS
INTERPOLATOR
FILTER
4:2:2 TO
YCrCb
4:4:4 8
TO U
INTER-
YUV
POLATOR
MATRIX
8
SATURATION CONTROL 10
+
PROGRAMMABLE
ADD BURST
10
CHROMA
8
V8
+
FILTER
INTERPOLATOR
ADV7172/ADV7173
REAL-TIME
CONTROL CIRCUIT
YUV TO
RBG
MATRIX
+
YUV
LEVEL
CONTROL
BLOCK
MODULATOR
+
HUE
CONTROL
10
10
SIN/COS
DDS BLOCK
SCRESET/RTC
GND
M
10 U 10 10-BIT
L
DAC
T
10
I 10
P
L
10-BIT
DAC
10
E 10
X
E
10-BIT
DAC
R
DAC
CONTROL
M
BLOCK
U
L
T
10
10-BIT
10 I
DAC
10
P
L
10
10-BIT
E
DAC
X
10 E 10 10-BIT
R
DAC
DAC
CONTROL
BLOCK
DAC A
DAC B
DAC C
VREF
RSET2
COMP2
DAC E
DAC F
DAC D
RSET1
COMP1
The ADV7172/ADV7173 is designed with four color controls
(hue, contrast, brightness and saturation). All YUV formats
(SMPTE/EBU N10, MII and Betacam) are supported in both
PAL and NTSC.
The output video frames are synchronized with the incoming data
Timing Reference Codes. Optionally the encoder accepts (and can
generate) HSYNC, VSYNC, and FIELD timing signals. These
timing signals can be adjusted to change pulsewidth and position
while the part is in the master mode. The Encoder requires a
single two times pixel rate (27 MHz) clock for standard opera-
tion. Alternatively the Encoder requires a 24.5454 MHz clock
for NTSC or 29.5 MHz clock for PAL square pixel mode
operation. All internal timing is generated on-chip.
HSO/CSO and VSO TTL outputs, synchronous to the analog
output video, are also available. A programmable CLAMP out-
put signal is also available to enable clamping in either the front
or back porch of the video signal.
A separate teletext port enables the user to directly input teletext
data during the vertical blanking interval.
The ADV7172/ADV7173 modes are set up over a 2-wire serial
bidirectional port (I2C-Compatible) with two slave addresses.
Functionally the ADV7173 and ADV7172 are the same with the
exception that the ADV7172 can output the Macrovision anti-
copy algorithm.
The ADV7172/ADV7173 is packaged in a 48-lead LQFP pack-
age (1.4 mm thickness).
DATA PATH DESCRIPTION
For PAL B, D, G, H, I, M, N, and NTSC M, N modes, YCrCb
4:2:2 Data is input via the CCIR-656-Compatible Pixel Port at a
27 MHz Data Rate. The Pixel Data is demultiplexed to form
three data paths. Y typically has a range of 16 to 235, Cr, and
Cb typically have a range of 128 ± 112; however, it is possible to
input data from 1 to 254 on both Y, Cb, and Cr. The ADV7172/
ADV7173 supports PAL (B, D, G, H, I, N, M) and NTSC
(with and without pedestal) standards. The Y data is then
manipulated by being scaled for contrast control and a setup
level is added for brightness control. The Cr, Cb data is also
scaled and saturation control is added. The appropriate Sync,
Blank and Burst levels are then added to the YCrCb data. Mac-
rovision AntiTaping (ADV7172 only), Closed-Captioning and
Teletext levels are also added to Y, and the resultant data is
interpolated to a rate of 27 MHz. The interpolated data is fil-
tered and scaled by three digital FIR Filters.
The U and V Signals are modulated by the appropriate sub-
carrier sine/cosine phases and a phase offset may be added onto
the color subcarrier during active video to allow hue adjustment.
The resulting U and V signals are then added together to make
up the chrominance signal. The luma (Y) signal can be delayed
1–3 luma cycles (each cycle is 74 ns) with respect to the chroma
signal. The luma and chroma signals are then added together to
make up the composite video signal. All edges are slew rate limited.
The YCrCb data is also used to generate RGB data with appro-
priate Sync and Blank levels.
There are six DACs on the ADV7172/ADV7173. Three of these
DACs are capable of providing 34.66 mA of current. The other
three DACs provide 8.66 mA each.
The six l0-bit DACs can be used to output:
1. Composite Video + RGB Video + LUMA + CHROMA.
2. Composite Video + YUV Video + LUMA + CHROMA.
Alternatively, each DAC can be individually powered off if not
required. A complete description of DAC output configurations
is given in Appendix 8.
Video output levels are illustrated in Appendix 6.
–2–
REV. B
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