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ADV7150LS170 Просмотр технического описания (PDF) - Analog Devices

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ADV7150LS170 Datasheet PDF : 36 Pages
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ADV7150
(Continued from page 1)
The device consists of three, high speed, 10-bit, video D/A con-
verters (RGB), three 256 × 10 (one 256 × 30) color look-up
tables, palette priority selects, a pixel input data multiplexer/
serializer and a clock generator/divider circuit. The ADV7150 is
capable of 1:1, 2:1 and 4:1 multiplexing. The onboard palette
priority select inputs enable multiple palette devices to be con-
nected together for use in multipalette and window applications.
The part is controlled and programmed through the micropro-
cessor (MPU) port. The part also contains a number of onboard
test registers, associated with self diagnostic testing of the de-
vice. The individual Red, Green and Blue pixel input ports al-
low True-Color, image rendition. True-Color image rendition,
at speeds of up to 220 MHz, is achieved through the use of the
onboard data multiplexer/serializer. The pixel input port’s flex-
ibility allows for direct interface to most standard frame buffer
memory configurations.
The 30 bits of resolution, associated with the color look-up table
and triple 10-bit DAC, realizes 24-bit True-Color resolution,
while also allowing for the onboard implementation of lineariza-
tion algorithms, such as Gamma-Correction. This allows effec-
tive 30-Bit True-Color operation.
The on-chip video clock controller circuit generates all the inter-
nal clocking and some additional external clocking signals. An
external ECL oscillator source with differential outputs is all
that is required to drive the CLOCK and CLOCK inputs of the
ADV7150. The part can also be driven by an external clock gen-
erator chip circuit, such as the AD730.
The ADV7150 is capable of generating RGB video output sig-
nals which are compatible with RS-343A and RS-170 video
standards, without requiring external buffering.
Test diagnostic circuitry has been included to complement the
users system level debugging.
The ADV7150 is fabricated in a +5 V CMOS process. Its
monolithic CMOS construction ensures greater functionality
with low power dissipation.
The ADV7150 is packaged in a plastic 160-pin power quad flat-
pack (QFP). Superior thermal dissipation is achieved by inclu-
sion of a copper heatslug, within the standard package outline to
which the die is attached.
CIRCUIT DETAILS AND OPERATION
OVERVIEW
Digital video or pixel data is latched into the ADV7150 over the
devices Pixel Port. This data acts as a pointer to the onboard
Color Palette RAM. The data at the RAM address pointed to is
latched into the digital-to-analog converters (DACs) and output
as an RGB analog video signal.
For the purposes of clarity of description, the ADV7150 is bro-
ken down into three separate functional blocks. These are:
1. Pixel port and clock control circuit
2. MPU port, registers and color palette
3. Digital-to-analog converters and video outputs
Table I shows the architectural and packaging differences be-
tween other devices in the ADV715x series of workstation parts.
(For more details consult the relevant data sheets.)
Table I. Architectural and Packaging Differences of the
ADV715x Series
Description
ADV7150 ADV7152* ADV7151*
24-Bit “Gamma” True Color •
24-Bit “Standard” True Color •
8-Bit “Gamma” Pseudo Color •
8-Bit “Standard” Pseudo Color •
15-Bit True Color
220 MHz – True Color
220 MHz – Pseudo Color
Triple 10-Bit DACs
4:1 Multiplexing
2:1 Multiplexing
1:1 Multiplexing
160-Lead QFP
100-Lead QFP
*See ADV7151 and ADV7150 data sheets for more information on these parts.
Pixel Port and Clock Control Circuit
The Pixel Port of the ADV7150 is directly interfaced to the
video/graphics pipeline of a computer graphics subsystem. It is
connected directly or through a gate array to the video RAM of
the systems Frame-Buffer (video memory). The pixel port on
the device consists of:
Color Data
Pixel Controls
Palette Selects
RED, GREEN, BLUE
SYNC, BLANK
PS0–PS1
The associated clocking signals for the pixel port include:
Clock Inputs
Clock Outputs
CLOCK, CLOCK,
LOADIN, SCKIN
LOADOUT, PRGCKOUT,
SCKOUT
These onboard clock control signals are included to simplify in-
terfacing between the part and the frame buffer. Only two con-
trol input signals are necessary to get the part operational,
CLOCK and CLOCK (ECL Levels). No additional signals or
external glue logic are required to get the Pixel Port & Clock
Control Circuit of the part operational.
Pixel Port (Color Data)
The ADV7150 has 96 color data inputs. The part has four (for
4:1 multiplexing) 24-bit wide direct color data inputs. These are
user programmed to support a number of color data formats in-
cluding 24-Bit True Color, 15-Bit True Color and 8-Bit Pseudo
Color (see “Color Data Formats” section) in 4:1, 2:1 and 1:1
multiplex modes.
RED 8
GREEN 8
BLUE 8
24
A
24
B
24
C
24
D
24
MULTIPLEXER
Figure 12. Multiplexed Color Inputs for the ADV7150
–12–
REV. A

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