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ADT7467ARQZ-R71 Просмотр технического описания (PDF) - ON Semiconductor

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ADT7467ARQZ-R71
ON-Semiconductor
ON Semiconductor ON-Semiconductor
ADT7467ARQZ-R71 Datasheet PDF : 77 Pages
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ADT7467
Alert Response Address
Alert response address (ARA) is a feature of SMBus devices that
allows an interrupting device to identify itself to the host when
multiple devices exist on the same bus.
The SMBALERT output can be used as either an interrupt
output or an SMBALERT. One or more outputs can be
connected to a common SMBALERT line connected to the
master. If a device’s SMBALERT line goes low, the following
procedure occurs:
1. SMBALERT is pulled low.
2. The master initiates a read operation and sends the alert
response address (ARA = 0001 100). This is a general call
address that must not be used as a specific device address.
3. The device whose SMBALERT output is low responds to
the alert response address, and the master reads its device
address. The address of the device is now known and can
be interrogated in the usual way.
4. If more than one device’s SMBALERT output is low, the
one with the lowest device address has priority in accor-
dance with normal SMBus arbitration.
5. Once the ADT7467 has responded to the alert response
address, the master must read the status registers. The
SMBALERT is cleared only if the error condition is absent.
SMBus TIMEOUT
The ADT7467 includes an SMBus timeout feature. If there is no
SMBus activity for 35 ms, the ADT7467 assumes that the bus is
locked and releases the bus. This prevents the device from
locking or holding the SMBus in anticipation of receiving data.
Some SMBus controllers cannot handle the SMBus timeout
feature, so it can be disabled.
Configuration Register 1 (0x40)
<6> TODIS = 0, SMBus timeout enabled (default)
<6> TODIS = 1, SMBus timeout disabled
Rev. 3 | Page 14 of 77 | www.onsemi.com

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