ADT7467ARQZ-R71 Просмотр технического описания (PDF) - ON Semiconductor
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ADT7467ARQZ-R71 Datasheet PDF : 77 Pages
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ADT7467
LIMITS, STATUS REGISTERS, AND INTERRUPTS
LIMIT VALUES
Register 0x58 TACH3 minimum low byte = 0xFF default
High and low limits are associated with each measurement
channel on the ADT7467. These limits form the basis of
system-status monitoring in that a status bit can be set for any
out-of-limit condition and detected by polling the device.
Alternatively, SMBALERT interrupts can be generated to flag a
processor or microcontroller of out-of-limit conditions.
8-Bit Limits
The following is a list of 8-bit limits on the ADT7467.
Register 0x59 TACH3 minimum high byte = 0xFF default
Register 0x5A TACH4 minimum low byte = 0xFF default
Register 0x5B TACH4 minimum high byte = 0xFF default
Out-of-Limit Comparisons
Once all limits are programmed, the ADT7467 can be enabled
for monitoring. The ADT7467 measures all voltage and
temperature measurements in round-robin format and sets
the appropriate status bit for out-of-limit conditions. TACH
Voltage Limit Registers
Register 0x46 VCCP low limit = 0x00 default
Register 0x47 VCCP high limit = 0xFF default
Register 0x48 VCC low limit = 0x00 default
Register 0x49 VCC high limit = 0xFF default
Temperature Limit Registers
Register 0x4E Remote 1 temperature low limit = 0x01 default
Register 0x4F Remote 1 temperature high limit = 0x7F default
Register 0x6A Remote 1 THERM temperature limit = 0xA4
default
Register 0x50 local temperature low limit = 0x01 default
Register 0x51 local temperature high limit = 0x7F default
measurements are not part of this round-robin cycle. Compari-
sons are done differently, depending on whether the measured
value is being compared to a high or low limit.
High limit: > comparison performed
Low limit: ≤ comparison performed
Voltage and temperature channels use a window comparator for
error detecting and, therefore, have high and low limits. Fan
speed measurements use only a low limit. This fan limit is
needed only in manual fan control mode.
Analog Monitoring Cycle Time
The analog monitoring cycle begins when a 1 is written to the
start bit (Bit 0) of Configuration Register 1 (0x40). By default,
the ADT7463 powers up with this bit set. The ADC measures
each analog input in turn and, as each measurement is com-
Register 0x6B local THERM temperature limit = 0xA4 default
Register 0x52 Remote 2 temperature low limit = 0x01 default
Register 0x53 Remote 2 temperature high limit = 0x7F default
Register 0x6C Remote 2 THERM temperature limit = 0xA4
default
pleted, the result is automatically stored in the appropriate value
register. This round-robin monitoring cycle continues unless
disabled by writing a 0 to Bit 0 of Configuration Register 1.
As the ADC is normally left to free-run in this manner, the time
to monitor all analog inputs is normally not of interest because the
most recently measured value of an input can be read at any time.
THERM Limit Register
Register 0x7A THERM timer limit = 0x00 default
16-Bit Limits
The fan TACH measurements are 16-bit results. The fan TACH
limits are also 16 bits, consisting of a high byte and low byte.
Because slow or stalled fans are normally the only conditions of
interest, only high limits exist for fan TACHs. Because the fan
TACH period is measured, exceeding the limit indicates a slow
or stalled fan.
Fan Limit Registers
Register 0x54 TACH1 minimum low byte = 0xFF default
Register 0x55 TACH1 minimum high byte = 0xFF default
Register 0x56 TACH2 minimum low byte = 0xFF default
Register 0x57 TACH2 minimum high byte = 0xFF default
For applications where the monitoring cycle time is important,
it can be calculated easily. The total number of channels
measured is
• One dedicated supply voltage input (VCCP)
• One supply voltage (VCC pin)
• One local temperature
• Two remote temperatures
As mentioned previously, the ADC performs round-robin
conversions. The total monitoring cycle time for averaged
voltage and temperature monitoring is 145 ms. The total
monitoring cycle time for voltage and temperature monitoring
with averaging disabled is 19 ms. The ADT7467 is a derivative
of the ADT7468. As a result, the total conversion time for the
ADT7467 and ADT7468 are the same, even though the
ADT7467 has less monitored channels.
Rev. 3 | Page 21 of 77 | www.onsemi.com
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