ADP3211 Просмотр технического описания (PDF) - ON Semiconductor
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ADP3211 Datasheet PDF : 32 Pages
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ADP3211, ADP3211A
ELECTRICAL CHARACTERISTICS (VCC = PVCC = 5.0 V, FBRTN = GND = PGND = 0 V, H = 5.0 V, L = 0 V, VVID = VDAC = 1.2 V,
TA = −10°C to 100°C, unless otherwise noted. (Note 1) Current entering a pin (sunk by the device) has a positive sign.
Parameter
Symbol
Conditions
Min
Typ
Max Units
VOLTAGE CONTROL − Voltage Error Amplifier (VEAMP)
FB, LLINE Voltage Range
(Note 2)
VFB, VLLINE
Relative to CSREF = VDAC
−200
+200 mV
FB, LLINE Offset Voltage
(Note 2)
VOSVEA
Relative to CSREF = VDAC
−0.5
+0.5
mV
FB Bias Current
LLINE Bias Current
LLINE Positioning Accuracy
IFB
ILL
VFB − VDAC
Measured on FB relative to nominal VDAC
LLINE forced 80 mV below CSREF
−1.0
+1.0
mA
−50
+50
nA
−78
−80
−82
mV
COMP Voltage Range
COMP Current
VCOMP
ICOMP
Voltage range of interest
COMP = 2.0 V, CSREF = VDAC
FB forced 200 mV below CSREF
FB forced 200 mV above CSREF
0.85
4.0
V
−650
mA
2.0
mA
COMP Slew Rate
SRCOMP
CCOMP = 10 pF, CSREF = VDAC,
Open loop configuration
FB forced 200 mV below CSREF
FB forced 200 mV above CSREF
V/ms
10
−10
Gain Bandwidth (Note 2)
GBW
VID DAC VOLTAGE REFERENCE
Non−inverting unit gain configuration,
RFB = 1 kW
20
MHz
VDAC Voltage Range (Note 2)
See VID Code Table
0
1.5
V
VDAC Accuracy
VFB − VDAC
Measured on FB (includes offset), relative to
nominal VDAC
VDAC = 0.3000 V to 1.2000 V
VDAC = 1.2125 V to 1.5000 V
−7.0
−9.0
mV
+7.0
+9.0
VDAC Differential Non−linearity (Note 2)
−1.0
+1.0 LSB
VDAC Line Regulation
ΔVFB
VCC = 4.75 V to 5.25 V
0.05
%
VDAC Boot Voltage
VBOOTFB
Measured during boot delay period, GPU = 0 V
V
ADP3211
1.100
ADP3211A
1.200
Soft−Start Delay (Note 2)
tDSS
Measured from EN pos edge to FB = 50 mV
200
ms
Soft−Start Time
tSS
Measured from EN pos edge to FB settles to
1.4
ms
Vboot = 1.1 V within −5%
Boot Delay
tBOOT
Measured from FB settling to Vboot = 1.1 V
100
ms
within −5% to CLKEN neg edge
VDAC Slew Rate
Soft−Start
Arbitrary VID step
0.0625
1.0
LSB/ms
FBRTN Current
IFBRTN
VOLTAGE MONITORING and PROTECTION − Power Good
70
200
mA
CSREF Undervoltage
Threshold
CSREF Overvoltage
Threshold
CSREF Crowbar Voltage
Threshold
VUVCSREF −
VDAC
VOVCSREF −
VDAC
VCBCSREF
Relative to nominal VDAC Voltage
Relative to nominal VDAC Voltage
Relative to FBRTN
−360 −300 −240 mV
150
200
250
mV
1.5
1.55
1.6
V
CSREF Reverse Voltage
Threshold
VRVCSREF
Relative to FBRTN, Latchoff Mode
CSREF is falling
CSREF is rising
mV
−350 −300
−75 −5.0
PWRGD Low Voltage
VPWRGD
IPWRGD(SINK) = 4 mA
75
200
mV
1. All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC).
2. Guaranteed by design or bench characterization, not production tested.
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