ADP3088(RevC) Просмотр технического описания (PDF) - Analog Devices
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ADP3088 Datasheet PDF : 16 Pages
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ADP3088
THEORY OF OPERATION
The ADP3088 is a fixed frequency buck switching regulator in
The current limit protection overrides the PWM comparator; if
an MSOP-8 package using an external Schottky rectifier. It
this occurs, then the switch pulse will be terminated and the soft
features an integrated 1 A power switch and switches at 1 MHz. start mode will be reset.
The ADP3088 uses PWM operation and incorporates soft start
for controlled start-up sequence and overtemperature switch
protection. The ADP3088 draws low current while running
in power saving mode and even lower current in shutdown.
Current Sense Amplifier
The voltage on the internal current sense resistor is sensed and
passed to the ramp input of the PWM comparator. This current
sense signal is also passed to the current limit comparator for
The system shown in the Functional Block Diagram is config-
peak current limit shutdown. At the current limit, the soft start
ured for a 1.8 V output using a 10 mH inductor. At the beginning capacitor is reset and soft start is reinitiated. The current limit is
of a cycle, the 1 MHz oscillator enables an SR latch, enabling the nominally 1.2 A. Slope compensation is added to the ADP3088
internal 1 A power switch. The current sense amplifier and the to stabilize the loop. A generated ramped signal is summed with
protection logic block monitor the current flowing between the the current sense signal to provide slope compensation. Slope
IN and SW pins. The switch is turned off when the current
reaches a level determined by the protection logic block or
PWM comparator, whichever is lower. The error amplifier
measures the output voltage through an external resistor divider
tied to the FB pin. This amplifier servos the switch current to
E regulate the FB pin voltage to 1.245 V. An internal regulator
provides power to the control circuitry. The COMP pin can be
used to shut down the ADP3088. When pulled low, it turns off
the internal regulator, thus biasing down the chip, reducing the
T input current, and disconnecting the output from the input.
Antisaturation circuitry is used to drive the switch to the edge of
saturation. This allows the driver to quickly switch at 1 MHz
and maintain good efficiency. For improved efficiency, the DRV
E pin may be connected to the output provided that the input
voltage is at least 1 V greater than the output.
If the output load increases, the error amplifier will detect a
L lower voltage on the FB pin via the resistor divider on the output
and send a signal to the PWM comparator to increase the on time
of the switch. This in effect increases the duty cycle and provides
more current to drive the increased load during the transient
event until a new operating point is established.
O Reference
The ADP3088 incorporates an internal band gap reference,
including curvature correction for an extremely low temperature
S coefficient. The reference can be disabled by grounding the
COMP pin, which also turns off the bias for the rest of the chip.
Error Amplifier
The error amplifier provides a control voltage to the PWM stage
B to set the peak inductor current that sets the output current of
the regulator. It is a gm amplifier in that its output is a current to
the COMP pin.
Protection Logic
O The protection logic block provides current limit and
compensation is needed to close the inner loop so subharmonic
oscillation is avoided. The ramp is reset with each clock cycle so
that the ADP3088 is capable of true 100% duty cycle.
Run/Stop Comparators
This block creates the 1 MHz signal sent to the SR latch that is
used for the switching frequency. It also takes the FB voltage
and decides when to go into wake-up mode from power saving
mode. The decision to induce the power saving mode is based
on the duty ratio. During steady-state continuous operation, the
duty ratio of a PWM buck regulator is simply a function of the
input/output voltage ratio, with second-order effects including
the voltage drop of the internal switch and the external diode.
Once the load drops to a certain point, discontinuous operation
occurs, and the duty ratio begins to modulate to maintain
regulation. In the ADP3088, the regulator goes to sleep when
the integrated duty ratio measurements drop to less than half of
the minimum expected integrated duty ratio. The minimum
expected duty ratio occurs at the maximum input voltage and
the minimum output voltage in continuous mode operation.
PWM Comparator
The PWM comparator looks at the signal from the current
sense amplifier and the error amplifier to determine the correct
switch-on time to regulate the output voltage under a given load.
Soft Start Timer
The soft start will prevent saturating the inductor, which could
cause uncontrolled overshoot of the output voltage and electrical
stress to the system at startup. When first powered up, an internal
soft start capacitor is discharged and the soft start circuitry
provides a gradually decaying offset to the error amplifier to
prevent it from saturating and from commanding the maximum
switch current to charge the output capacitor. The output
voltage approaches the final regulation voltage with a smooth
exponential decay. This will reduce electrical stress to the system.
overtemperature protection. The overtemperature protection is Output
enabled when the temperature of the chip exceeds a specified
The output stage contains the bipolar power switch and the
preset temperature; the switch will be disabled until the tempera- circuits necessary to switch it on and off quickly. The pass
ture drops below a specified level, then normal operation will
switch is driven to the edge of saturation, and the result is a fast
resume. The thermal shutdown only stops switching, but it does switching response and low switch resistance. For improved
not put the chip into power saving mode, nor does it reinitiate soft efficiency, the DRV pin may be connected to the output, provided
start. As the chip cools slightly, it will rapidly cycle in and out of
that the input voltage is at least 1 V higher than the output.
thermal shutdown, maintaining the die temperature at 160∞C but This will send the current needed to drive the bipolar switch to
allowing the output voltage and current to swing up and down.
the output load instead of routing it to ground. For some VIN
and ILOAD configurations, the DRV pin must be grounded for
reliable operation.
–8–
REV. C
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