ADN4662 Просмотр технического описания (PDF) - Analog Devices

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ADN4662

Single, 3 V, CMOS, LVDS Differential Line Receiver

Analog Devices 

Data Sheet

THEORY OF OPERATION

The ADN4662 is a single line receiver for low voltage

differential signaling. It takes a differential input signal of

310 mV typically and converts it into a single-ended 3 V

TTL/CMOS logic signal.

A differential current input signal, received via a transmission

medium, such as a twisted pair cable, develops a voltage across

a terminating resistor, RT. This resistor is chosen to match the

characteristic impedance of the medium, typically around

100 Ω. The differential voltage is detected by the receiver and

converted back into a single-ended logic signal.

When the noninverting receiver input, RIN+, is positive with

respect to the inverting input RIN− (current flows through RT

from RIN+ to RIN−), then ROUT is high. When the noninverting

receiver input RIN+ is negative with respect to the inverting

input RIN− (current flows through RT from RIN− to RIN+), then

ROUT is low.

The ADN4662 differential line receiver is capable of receiving

signals of 100 mV over a ±1 V common-mode range centered

around 1.2 V. This relates to the typical driver offset voltage

value of 1.2 V. The signal originating from the driver is centered

around 1.2 V and may shift ±1 V around this center point. This

±1 V shifting may be caused by a difference in the ground

potential of the driver and receiver, the common-mode effect of

coupled noise, or both.

Using the ADN4663 as a driver, the received differential current

is between 2.5 mA and 4.5 mA (typically 3.1 mA), developing

between 250 mV and 450 mV across a 100 Ω termination resis-

tor. The received voltage is centered around the receiver offset of

1.2 V. In other words, the noninverting receiver input is typically

ADN4662

(1.2 V + [310 mV/2]) = 1.355 V, and the inverting receiver input

(1.2 V − [310 mV/2]) = 1.045 V for Logic 1. For Logic 0, the

inverting and noninverting input voltages are reversed. Note that

because the differential voltage reverses polarity, the peak-to-peak

voltage swing across RT is twice the differential voltage.

Current mode signalling offers considerable advantages over

voltage mode signalling, such as RS-422. The operating current

remains fairly constant with increased switching frequency,

whereas with voltage mode drivers the current increases

exponentially in most cases. This is caused by the overlap as

internal gates switch between high and low, which causes currents

to flow from VCC to ground. A current mode device simply reverses

a constant current between its two outputs, with no significant

overlap currents.

This is similar to emitter-coupled logic (ECL) and positive emitter-

coupled logic (PECL), but without the high quiescent current of

ECL and PECL.

APPLICATIONS INFORMATION

Figure 23 shows a typical application for point-to-point data

transmission using the ADN4663 as the driver.

0.1µF

VCC

3.3V

+ 10µF

TANTALUM

0.1µF

VCC

3.3V

+ 10µF

TANTALUM

ADN4661

DOUT+

RIN+

ADN4662

DIN

RT 100Ω

DOUT–

RIN–

ROUT

GND

GND

Figure 23. Typical Application Circuit

Rev. A | Page 11 of 12

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