DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ADN2891(RevA) Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге
Компоненты Описание
производитель
ADN2891
(Rev.:RevA)
ADI
Analog Devices ADI
ADN2891 Datasheet PDF : 16 Pages
First Prev 11 12 13 14 15 16
APPLICATIONS
PCB DESIGN GUIDELINES
Proper RF PCB design techniques must be used to ensure
optimal performance.
Output Buffer Power Supply and Ground Planes
Pin 9 (DRVEE) and Pin 12 (DRVCC) are the power supply and
ground pins that provide current to the differential output
buffer. To reduce possible series inductance, Pin 9, which is the
ground return of the output buffer, should connect to ground
directly. If the ground plane is an internal plane and
connections to the ground plane are vias, multiple vias in
parallel to ground can reduce series inductance.
Similarly, to reduce the possible series inductance, Pin 12,
which supplies power to the high speed differential
OUTP/OUTN output buffer, should connect to the power plane
directly. If the power plane is an internal plane and connections
to the power plane are vias, multiple vias in parallel can reduce
the series inductance, especially on Pin 12. See Figure 20 for the
recommended connections.
ADN2891
The exposed pad should connect to the GND plane using filled
vias so that solder does not leak through the vias during reflow.
Using filled vias in parallel under the package greatly reduces
the thermal resistance and enhances the reliability of the
connectivity of the exposed pad to the GND plane during
reflow.
To reduce power noise, a 10 μF electrolytic decoupling capacitor
between power and ground should be close to where the 3.3 V
supply enters the PCB. The other 0.1 μF and 1 nF ceramic chip
decoupling capacitors should be close to the VCC and VEE pins
to provide better decouple filtering and a shorter current return
loop.
VCC
VCC
0.1μF
C9
RSSI MEASUREMENT
TO ADC
R1 C10
ADN2880
VCC
C5 C6
16 15 14 13
AVCC
1
ADN2891
DRVCC
12
C1
PIN
2
C2
NIN
3
CONNECT
EXPOSED
PAD TO
GND
OUTP C3
11
OUTN C4
10
AVEE
4
DRVEE
9
5
6
7
8
VCC
C7 C8
TO HOST
BOARD
C11
C12
R2
C1–C4, C11: 0.01μF X5R/X7R DIELECTRIC, 0201 CASE
C5, C7, C9, C10, C12: 0.1μF X5R/X7R DIELECTRIC, 0402 CASE
C6, C8: 1nF X5R/X7R DIELECTRIC, 0201 CASE
R3
4.7kΩ TO 10kΩ
ON HOST BOARD
VCC
Figure 20. Typical Applications Circuit (Example of Using PIN PD and On-Chip RSSI Detector)
Rev. A | Page 11 of 16

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]