ADN2890(Rev0) Просмотр технического описания (PDF) - Analog Devices

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производитель

ADN2890
(Rev.:Rev0)

3.3 V 2.7 Gb/s Limiting Amplifier

Analog Devices 

ADN2890

THEORY OF OPERATION

LIMAMP

Input Buffer

The limiting amplifier has differential inputs (PIN/NIN), with

an internal 50 Ω termination. The ROSA (receive optical sub-

assembly) is typically ac-coupled to the ADN2890 inputs,

although dc coupling is possible.

An internal offset correction loop requires that a capacitor be

connected between the CAZ1 and CAZ2 pins. A 0.01 µF

capacitor provides a low frequency cutoff of 2 kHz.

CML Output Buffer

The ADN2890 provides CML outputs, OUTP/OUTN. The

outputs are internally terminated with 50 Ω to VCC.

The outputs can be kept at a static voltage by driving the

SQUELCH pin to a logic high. The SQUELCH pin can be

driven directly by the LOS pin, which automatically disables the

LIMAMP outputs in situations with no data input.

LOSS OF SIGNAL (LOS) DETECTOR

The receiver front-end LOS detector circuit indicates when the

input signal level has fallen below the user-adjustable threshold.

The threshold is set by a resistor connected between the

THRADJ pin and VEE. The ADN2890 LOS circuit has a trip

point down to <3.0 mV with >3 dB electrical hysteresis to

prevent chatter at the LOS output. The LOS output is an open-

collector output that must be pulled up externally with a 4.7 kΩ

to 10 kΩ resistor.

RECEIVED SIGNAL STRENGTH INDICATOR (RSSI)

The ADN2890 has an on-chip RSSI circuit that automatically

detects the average received power based on a direct measure-

ment of the PIN photodiode’s current. The photodiode bias is

supplied by the ADN2890, which allows a very accurate, on-

chip, average power measurement based on the amount of

current supplied to the photodiode. The output of the RSSI is a

current that is directly proportional to the average amount of

PIN photodiode current. Placing a resistor between the

RSSI_OUT pin and GND converts the current to a GND

referenced voltage. This function eliminates the need for

external RSSI circuitry in SFF-8472 compliant optical receivers.

SQUELCH MODE

Driving the SQUELCH input to a logic high disables the

limiting amplifier outputs. The SQUELCH input can be

connected to the LOS output to keep the limiting amplifier

outputs at a static voltage level anytime the input level to the

limiting amplifier drops below the programmed LOS threshold.

Rev. 0 | Page 8 of 12

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