ADN2873(RevB) Просмотр технического описания (PDF) - Analog Devices

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ADN2873
(Rev.:RevB)

3.3 V, 50 Mbps to 4.25 Gbps, Single-Loop, Laser Diode Driver

Analog Devices 

Data Sheet

ADN2873

SFP TIMING SPECIFICATIONS

Table 2.

Parameter

Symbol Min Typ Max Unit Test Conditions/Comments

ALS Assert Time

t_off

1

5

µs Time for the rising edge of ALS (Tx_DISABLE) to when

the bias current falls below 10% of nominal

ALS Negate Time1

t_on

0.15 0.4 ms Time for the falling edge of ALS to when the modulation

current rises above 90% of nominal

Time to Initialize, Including Reset of FAIL1 t_init

25 275 ms From power-on or negation of FAIL using ALS

FAIL Assert Time

t_fault

100 µs Time to fault to FAIL on

ALS to Reset Time

t_reset

5

µs Time Tx_DISABLE must be held high to reset Tx_FAULT

1 Guaranteed by design and characterization. Not production tested.

VSE

DATAP

DATAN

DATAP – DATAN

0V

V p-p DIFF = 2 × VSE

Figure 4. Signal Level Definition

SFP MODULE

VCC_Tx

1µH

0.1µF

0.1µF

3.3V

10µF

SFP HOST BOARD

Figure 5. Recommended SFP Supply

Rev. B | Page 5 of 20

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