ADN2872(RevB) Просмотр технического описания (PDF) - Analog Devices
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ADN2872 Datasheet PDF : 20 Pages
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ADN2872
Data Sheet
Parameter
SUPPLY
ICC7
VCC (with respect to GND)8
Min Typ Max Unit Conditions/Comments
30
mA
3.0 3.3 3.6 V
When IBIAS = IMOD = 0
1 Temperature range is −40°C to +85°C.
2 Measured into a 15 Ω load (22 Ω resistor in parallel with digital scope 50 Ω input) using a 11110000 pattern at 2.5 Gbps, shown in Figure 2.
3 Guaranteed by design and characterization. Not production tested.
4 When the voltage on DATAP is greater than the voltage on DATAN, the modulation current flows into the IMODP pin.
5 Guaranteed by design. Not production tested.
6 IBIAS/IBMON ratio stability is defined in SFF-8472 Revision 9 over temperature and supply variation.
7 See the Power Consumption section for ICC minimum for power calculation.
8 All VCC pins must be shorted together.
SFP TIMING SPECIFICATIONS
VCC
VCC
ADN2872 R
22Ω
IMODP
L
C
BIAS TEE
80kHz → 27GHz
TO HIGH SPEED
DIGITAL
OSCILLOSCOPE
50Ω INPUT
Figure 2. High Speed Electrical Test Output Circuit
Table 2.
Parameter
Symbol Min Typ Max Unit Conditions/Comments
ALS Assert Time
t_off
1 5 μs Time for the rising edge of ALS (Tx_DISABLE) to
when the bias current falls below 10% of nominal
ALS Negate Time1
t_on
0.83 0.95 ms Time for the falling edge of ALS to when the
modulation current rises above 90% of nominal
Time to Initialize, Including Reset of FAIL1 t_init
25 275 ms From power-on or negation of FAIL using ALS
FAIL Assert Time
t_fault
100 μs Time to fault to FAIL on
ALS to Reset Time
t_reset
5 μs Time Tx_DISABLE must be held high to reset Tx_FAULT
1 Guaranteed by design and characterization. Not production tested.
VSE
DATAP
DATAN
DATAP – DATAN
0V
Vp-p, DIFF = 2 × VSE
Figure 3. Signal Level Definition
SFP MODULE
VCC_Tx
1µH
0.1µF
0.1µF
3.3V
10µF
SFP HOST BOARD
Figure 4. Recommended SFP Supply
Rev. B | Page 4 of 20
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