ADN2871ACPZ1 Просмотр технического описания (PDF) - Analog Devices

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ADN2871ACPZ1

3.3 V, 50 Mbps to 4.25 Gbps, Single-Loop, Laser Diode Driver

Analog Devices 

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

ADN2871

18

19

GND

VCC

IMODP

IMODN

GND

IBIAS

24

1

ADN2871

13

12

ALS

DATAN

DATAP

GND

PAVCAP

NC

7

6

NC = NO CONNECT

Figure 6. Pin Configuration—Top View

Note: The LFCSP has an exposed paddle that must be connected to ground.

Table 4. Pin Function Descriptions

Pin No. Mnemonic Description

1

CCBIAS

In ac-coupled mode, CCBIAS can connect to either IBIAS or VCC. In dc-coupled mode, CCBIAS can connect to VCC.

2

PAVSET

Average Optical Power Set Pin.

3

GND

Supply Ground.

4

VCC

Supply Voltage.

5

PAVREF

Reference Voltage Input for Average Optical Power Control.

6

RPAV

Average Power Resistor when Using PAVREF.

7

NC

No Connect.

8

PAVCAP

Average Power Loop Capacitor.

9

GND

Supply Ground.

10

DATAP

Data, Positive Differential Input.

11

DATAN

Data, Negative Differential Input.

12

ALS

Automatic Laser Shutdown.

13

ERSET

Extinction Ratio Set Pin.

14

IMMON

Modulation Current Monitor Current Source.

15

ERREF

Reference Voltage Input for Extinction Ratio Control.

16

VCC

Supply Voltage.

17

IBMON

Bias Current Monitor Current Source.

18

FAIL

Fail Alarm Output.

19

GND

Supply Ground.

20

VCC

Supply Voltage.

21

IMODP

Modulation Current Positive Output (Current Sink), Connect to Laser Diode.

22

IMODN

Modulation Current Negative Output (Current Sink).

23

GND

Supply Ground.

24

IBIAS

Laser Diode Bias (Current Sink to Ground).

Rev. A | Page 7 of 20

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