ADN2850(RevB) Просмотр технического описания (PDF) - Analog Devices
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ADN2850 Datasheet PDF : 20 Pages
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ADN2850
TIMING DIAGRAMS
CS
CPHA = 1
CLK
CPOL = 1
SDO
SDI
t2
t8
*
t1
t5
t4
MSB
MSB
t10
t7
t6
t12
t3
t13
t17
t11
t9
LSB OUT
LSB
RDY
t14
t15
t16
*NOT DEFINED, BUT NORMALLY LSB OF CHARACTER PREVIOUSLY TRANSMITTED.
THE CPOL = 1 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
Figure 2a. CPHA = 1 Timing Diagram
CS
CLK
CPOL = 0
SDO
SDI
CPHA = 0
t2
t8
t1
t5
t4
t10
MSB OUT
MSB IN
t7
t6
t12
t3
t13
t17
t11
LSB
t9
*
LSB
RDY
t14
t15
t16
*NOT DEFINED, BUT NORMALLY MSB OF CHARACTER JUST RECEIVED.
THE CPOL = 0 MICROCONTROLLER COMMAND ALIGNS THE INCOMING DATA TO THE POSITIVE EDGE OF THE CLOCK.
Figure 2b. CPHA = 0 Timing Diagram
–4–
REV. B
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