ADN2815 Просмотр технического описания (PDF) - Analog Devices

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ADN2815

Continuous Rate 10 Mb/s to 1.25 Gb/s Clock and Data Recovery IC

Analog Devices 

ADN2815

TABLE OF CONTENTS

Features .............................................................................................. 1

Applications....................................................................................... 1

General Description ......................................................................... 1

Functional Block Diagram .............................................................. 1

Revision History ............................................................................... 2

Specifications..................................................................................... 3

Jitter Specifications ....................................................................... 4

Output and Timing Specifications ............................................. 5

Absolute Maximum Ratings............................................................ 6

Thermal Characteristics .............................................................. 6

ESD Caution.................................................................................. 6

Timing Characteristics..................................................................... 7

Pin Configuration and Function Descriptions............................. 8

I2C Interface Timing and Internal Register Description ............. 9

Jitter Specifications ......................................................................... 11

REVISION HISTORY

4/14—Rev. B to Rev. C

Updated Outline Dimensions ....................................................... 24

Changes to Ordering Guide .......................................................... 24

5/10—Rev. A to Rev. B

Changes to Figure 5 and Table 5..................................................... 8

Changes to Figure 19...................................................................... 19

2/09—Rev. 0 to Rev. A

Updated Outline Dimensions ....................................................... 24

Changes to Ordering Guide .......................................................... 24

9/05—Revision 0: Initial Version

Data Sheet

Theory of Operation ...................................................................... 12

Functional Description .................................................................. 14

Frequency Acquisition............................................................... 14

Input Buffer ................................................................................. 14

Lock Detector Operation .......................................................... 14

Harmonic Detector .................................................................... 15

SQUELCH Mode........................................................................ 15

I2C Interface ................................................................................ 15

Reference Clock (Optional) ...................................................... 16

Applications Information .............................................................. 19

PCB Design Guidelines ............................................................. 19

Coarse Data Rate Readback Look-Up Table............................... 22

Outline Dimensions ....................................................................... 24

Ordering Guide .......................................................................... 24

Rev. C | Page 2 of 24

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