ADN2814ACPZ Просмотр технического описания (PDF) - Analog Devices
Номер в каталоге
Компоненты Описание
производитель
ADN2814ACPZ
Analog Devices
ADN2814ACPZ Datasheet PDF : 28 Pages
| |||
Data Sheet
ADN2814
Table 6. Internal Register Map1
Reg
Name R/W Addr D7
D6
D5
D4 D3
D2
FREQ0 R 0x0 MSB
FREQ1 R 0x1 MSB
FREQ2 R 0x2 0
MSB
RATE R 0x3
COARSE_RD[8] MSB
Coarse Data Rate Readback
MISC R 0x4 x
x
LOS Status Static LOL
LOL Status
Data Rate
Measure
Complete
CTRLA W 0x8
FREF Range
Data Rate/DIV_FREF Ratio
CTRLB W 0x9 Config Reset System
0
LOL
MISC[4] Reset
Reset 0
MISC[2]
CTRLC W 0x11 0
0
0
0
0
Config LOS
1 All writeable registers default to 0x00.
D1
D0
LSB
LSB
LSB
COARSE_RD[1]
x
COARSE_RD[0] LSB
Measure Data Rate Lock to Reference
0
0
SQUELCH Mode
Output Boost
Table 7. Miscellaneous Register, MISC
LOS Status
D7 D6 D5
x x 0 = No loss of signal
1 = Loss of signal
Static LOL
D4
0 = Waiting for next LOL
1 = Static LOL until reset
LOL Status
D3
0 = Locked
1 = Acquiring
Data Rate Measurement
Complete
D2
0 = Measuring data rate
1 = Measurement complete
Coarse Rate
Readback LSB
D1 D0
x COARSE_RD[0]
Table 8. Control Register, CTRLA1
FREF Range
Data Rate/Div_FREF Ratio
D7 D6
D5 D4 D3 D2
0 0 10 MHz to 20 MHz
00001
0 1 20 MHz to 40 MHz
00012
1 0 40 MHz to 80 MHz
00104
1 1 80 MHz to 160 MHz n
2n
1 0 0 0 256
Measure Data Rate
D1
Set to 1 to measure data rate
Lock to Reference
D0
0 = Lock to input data
1 = Lock to reference clock
1 Where DIV_FREF is the divided down reference referred to the 10 MHz to 20 MHz band (see the Reference Clock (Optional) section).
Table 9. Control Register, CTRLB
Config LOL
Reset MISC[4]
D7
D6
0 = LOL pin normal operation Write a 1 followed
1 = LOL pin is static LOL
by 0 to reset MISC[4]
System Reset
D5
Write a 1 followed by
0 to reset ADN2814
D4
Set to 0
Reset MISC[2]
D3
Write a 1 followed
by 0 to reset MISC[2]
D2
D1
D0
Set to 0 Set to 0 Set to 0
Table 10. Control Register, CTRLC
D7
D6
D5
D4
Set to 0 Set to 0 Set to 0 Set to 0
D3
Set to 0
Config LOS
D2
0 = Active high LOS
1 = Active low LOS
SQUELCH Mode
D1
0 = SQUELCH CLK and DATA
1 = SQUELCH CLK or DATA
Output Boost
D0
0 = Default output swing
1 = Boost output swing
Rev. C | Page 11 of 28
Share Link: