ADN2814(RevPrA) Просмотр технического описания (PDF) - Analog Devices
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Компоненты Описание
производитель
ADN2814
(Rev.:RevPrA)
(Rev.:RevPrA)
Analog Devices
ADN2814 Datasheet PDF : 28 Pages
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Preliminary Technical Data
OUTPUT AND TIMING SPECIFICATIONS
Table 3.
Parameter
LVDS OUPUT CHARACTERISTICS
(CLKOUTP/N, DATAOUTP/N)
Single-Ended Output Swing
Differential Output Swing
Output Offset Voltage
Output Impedance
LVDS Ouputs Timing
Rise Time
Fall Time
Setup Time
Hold Time
I2C INTERFACE DC CHARACTERISTICS
Input High Voltage
Input Low Voltage
Input Current
Output Low Voltage
I2C INTERFACE TIMING
SCK Clock Frequency
SCK Pulse Width High
SCK Pulse Width Low
Start Condition Hold Time
Start Condition Setup Time
Data Setup Time
Data Hold Time
SCK/SDA Rise/Fall Time
Stop Condition Setup Time
Bus Free Time between a Stop and a Start
REFCLK CHARACTERISTICS
Input Voltage Range
Minimum Differential Input Drive
Reference Frequency
Required Accuracy
LVTTL DC INPUT CHARACTERISTICS
Input High Voltage
Input Low Voltage
Input High Current
Input Low Current
LVTTL DC OUTPUT CHARACTERISTICS
Output High Voltage
Output Low Voltage
Conditions
VSE (see Figure 3)
VDIFF (see Figure 3)
Differential
20% to 80%
80% to 20%
TS (see Figure 2), OC12
TH (see Figure 2), OC12
LVCMOS
VIH
VIL
VIN = 0.1 VCC or VIN = 0.9 VCC
VOL, IOL = 3.0 mA
(See Figure 10)
tHIGH
tLOW
tHD;STA
tSU;STA
tSU;DAT
tHD;DAT
TR/TF
tSU;STO
tBUF
Optional lock to REFCLK mode
@ REFCLKP or REFCLKN
VIL
VIH
VIH
VIL
IIH, VIN = 2.4 V
IIL, VIN = 0.4 V
VOH, IOH = −2.0 mA
VOL, IOL = 2.0 mA
Min
250
500
1125
0.7 VCC
−10.0
600
1300
600
600
100
300
20 + 0.1 Cb1
600
1300
12.3
2.0
−5
2.4
Typ
1200
100
TBD
TBD
800
800
0
VCC
100
100
1 Cb = total capacitance of one bus line in pF. If mixed with Hs-mode devices, faster fall-times are allowed.
ADN2814
Max
Unit
400
mV
800
mV
1275
mV
Ω
ps
ps
ps
ps
V
0.3 VCC V
+10.0
µA
0.4
V
400
kHz
ns
ns
ns
ns
ns
ns
300
ns
ns
ns
V
V
mV p-p
200
MHz
ppm
V
0.8
V
5
µA
µA
V
0.4
V
Rev. PrA | Page 5 of 28
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