ADN2805(Rev0) Просмотр технического описания (PDF) - Analog Devices

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производитель

ADN2805
(Rev.:Rev0)

1.25 Gbps Clock and Data Recovery IC

Analog Devices 

ADN2805

SPECIFICATIONS

TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 223 − 1,

unless otherwise noted.

Table 1.

Parameter

QUANTIZER—DC CHARACTERISTICS

Input Voltage Range

Peak-to-Peak Differential Input

Input Common-Mode Level

QUANTIZER—AC CHARACTERISTICS

Data Rate

S11

Input Resistance

Input Capacitance

LOSS-OF-LOCK (LOL) DETECT

VCO Frequency Error for LOL Assert

VCO Frequency Error for LOL Deassert

LOL Response Time

ACQUISITION TIME

Lock-to-Data Mode

Optional Lock to REFCLK Mode

DATA RATE READBACK ACCURACY

Fine Readback

POWER SUPPLY

Power Supply Voltage

Power Supply Current

OPERATING TEMPERATURE RANGE

Conditions

@ PIN or NIN, dc-coupled

PIN − NIN

DC-coupled

@ 2.5 GHz

Differential

With respect to nominal

With respect to nominal

GbE

In addition to REFCLK accuracy

Locked to 1.25 Gbps

Min Typ

Max

1.8

2.8

0.2

2.0

2.3

2.5

2.8

1250

−15

100

0.65

1000

250

200

1.5

20.0

100

3.0

3.3

3.6

118

131

−40

+85

Unit

V

V

V

Mbps

dB

Ω

pF

ppm

ppm

μs

ms

ms

ppm

V

mA

°C

JITTER SPECIFICATIONS

TA = TMIN to TMAX, VCC = VMIN to VMAX, VEE = 0 V, CF = 0.47 μF, SLICEP = SLICEN = VEE, input data pattern: PRBS 223 − 1,

unless otherwise noted.

Table 2.

Parameter

PHASE-LOCKED LOOP CHARACTERISTICS

Jitter Peaking

Jitter Generation

Jitter Tolerance

Conditions

GbE, IEEE 802.3, 637 kHz

Min

0.749

Typ

0

0.001

0.02

Max

0.03

0.003

0.04

Unit

dB

UI rms

UI p-p

UI p-p

Rev. 0 | Page 3 of 16

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