ADMCF340 Просмотр технического описания (PDF) - Analog Devices

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ADMCF340

DashDSP™ 64-Lead Flash Mixed-Signal DSP with Enhanced Analog Front End

Analog Devices 

ADMCF340

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External PWMTRIP Pin

Switched Reluctance Motor Mode Selection Pin

PWM Polarity Selection Pin

Integrated 13-Channel ADC Subsystem

Three Bipolar ISENSE Inputs with Programmable

Sample and Hold Amplifier and Overcurrent

Protection (Usable as Three Dedicated Analog Inputs)

Three Simultaneous Converting Voltage Inputs

Seven Muxed Auxiliary Analog Inputs

Internal Voltage Reference (2.5 V)

Acquisition Synchronized to PWM Switching

Frequency

25-Pin Digital I/O Port

Bit Configurable as Input or Output

Change of State Interrupt Support

Two 16-Bit Auxiliary PWM Timers

Synthesized Analog Output

Programmable Frequency

0% to 100% Duty Cycle

Two Programmable Operation Modes

Independent Mode/Offset Mode

GENERAL DESCRIPTION

The ADMCF340 is a low cost, single-chip DSP-based controller

suitable for permanent magnet synchronous, ac induction, switched

reluctance, and brushless dc motors. The ADMCF340 integrates

a 20 MHz, fixed-point DSP core with a complete set of motor control

and system peripherals that permit fast, efficient development of

motor controllers.

The DSP core of the ADMCF340 is completely code compatible

with the ADSP-21xx DSP family and combines three computa-

tional units, data address generators, and a program sequencer.

The computational units comprise an ALU, a multiplier/accumu-

lator (MAC), and a barrel shifter. There are special instructions

for bit manipulation, multiplication (x squared), biased rounding,

and global interrupt masking. The system peripherals are the

power-on reset circuit (POR), the watchdog timer, and two

synchronous serial ports. The serial ports are configurable,

and double buffered, with hardware support for UART, SCI,

and SPI port emulation. The ADMCF340 provides 512 × 24-bit

program memory RAM, 4K × 24-bit program memory ROM,

4K × 24-bit program FLASH memory, and 512 × 16-bit data

memory RAM. The user code will be stored and executed from

the flash memory. The program and data memory RAM can be

used for dynamic data storage or can be loaded through the

serial port from an external device as in other ADMCxx family

parts. The program memory ROM contains a monitor function

as well as useful routines for erasing, programming, and verifying

the flash memory.

The motor control peripherals of the ADMCF340 provide a 12-bit

analog data acquisition system with 13 analog input channels,

three dedicated ISENSE functions (combining internal amplifi-

cation, sampling, and overcurrent PWM shutdown features),

and an internal voltage reference. In addition, a three-phase,

16-bit, center-based PWM generation unit can be used to produce

high accuracy PWM signals with minimal processor overhead. The

ADMCF340 also contains two 16-bit auxiliary PWM timers

and 25 lines of programmable digital I/O.

Several functions such as the auxiliary PWM and the serial com-

munication ports are multiplexed with the nine PORT A (9, PIO)

programmable input/output (PIO) pins. The other 16 pro-

grammable digital I/O are dedicated. The pin functions can

be independently selected to allow maximum flexibility for

different applications.

DATA

ADDRESS

GENERATOR

#1

DATA

ADDRESS

GENERATOR

#2

INSTRUCTION

REGISTER

PROGRAM

SEQUENCER

14

14

24

BUS

EXCHANGE

16

PM ROM

4K ؋ 24

PM RAM

512 ؋ 24

FLASH

PROGRAM

MEMORY

4K ؋ 24

PMA BUS

DMA BUS

PMD BUS

DMD BUS

DM RAM

512 ؋ 16

INPUT REGS

ALU

OUTPUT REGS

INPUT REGS

MAC

OUTPUT REGS

16

R BUS

INPUT REGS

SHIFTER

OUTPUT REGS

CONTROL

LOGIC

COMPANDING

CIRCUITRY

Figure 3. DSP Core Block Diagram

–8–

TIMER

TRANSMIT REG

RECEIVE REG

SERIAL

PORT

6

REV. 0

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