ADM8840 Просмотр технического описания (PDF) - Analog Devices

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производитель

ADM8840

Charge Pump Regulator & COM Driver for Color TFT Panel

Analog Devices 

Pin

1,32

2, 22

3

4

5

6

7

9

17, 31

13

12

11

18

16

14

8

10

15

PRELIMINARY TECHNICAL DATA

Mnemonic

PIN FUNCTION DESCRIPTION

Function

ADM8840

C1+,C1-

VCC

VOUT

+5VOUT

+5VIN

SHDN

DAC1_SD

DAC1_IN

GND

SCLK

DATA

CS / LDAC

COM_IN

COM_OUT_AC

COM_OUT

DAC2_SD

DAC2_IN

TRANS_OUT

External capacitor C1 is connected between these pins. A 3.3␮F capacitor is

recommended.

Positive Supply Voltage Input. Connect this pin to 3V supply. A 4.7␮F

decoupling capacitor should be attached close to pin 2.

Voltage Doubler Output. This was derived by doubling the 3V supply. A 3.3␮F

capacitor to ground is required on this pin.

+5.0V output pin. This was derived by doubling and regulating the +3V supply.

A 2.2␮F capcitor to ground is required on this pin to stabilise the regulator.

+5.0V input pin. This is the input to the voltage tripler and inverter charge pump

circuits.

Digital Input. 3V CMOS Logic. Active low shutdown control. This shuts down

the timing generator and enables the discharge circuit to dissipate the charge on

the voltage outputs, thus driving them to 0V.

Switches over to external DAC1 input when asserted.

Input for external DAC1 signal.

Device Ground Pin.

External Clock Input. Used to load DAC 1 with COM Voltage amplitude and

DAC 2 with COM Centre Voltage.

Digital Data Input to both DAC’s 1 and 2.

Dual function pin.

1.Chip Select. Digital Input Logic. Chip Select for Digital Interface.

2. Load DAC. Digital Input Logic. DAC’s 1 and 2 perform a conversion on a

low-to-high transition.

Clock Input from digital controller chip. This input is level shifted, offset and

inverted to provide a COM Voltage output swing at a frequency of the COM_IN

input.

COM_OUT_AC outputs the COM_IN signal inverted and level shifted by the

value programmed on DAC 1. A 4.7␮F capacitor is connected between this pin

and COM_OUT.

The AC output on COM_OUT_AC is added to the center voltage programmed on

DAC2 so that the desired amplitude, centered about the correct center voltage

appears on COM_OUT. The load capacitance seen by this pin is the bulk capaci

tance of the panel, typically 20nF.

Switches over to external DAC2 input when asserted.

Input for external DAC2 signal.

Level Translator Reference Output Voltage. This is the voltage that the value on

DAC 1 is gained up to to provide the upper voltage for the Level Translator. A

voltage of between 4.0V and 7.0V can be output here. A 4.7␮F cap is

recommended for this pin.

CAUTION

ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily

accumulate on the human body and test equipment and can discharge without detection.

Although the ADM8840 features proprietary ESD protection circuitry, permanent damage

may occur on devices subjected to high energy electrostatic discharges. Therefore, proper

ESD precautions are recommended to avoid performance degradation or loss of functionality.

REV. PrG 2/03

–5–

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