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ADM6996F Просмотр технического описания (PDF) - Infineon Technologies

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ADM6996F Datasheet PDF : 69 Pages
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ADM6996F
Interface Description
2.2 Pin Description by Function
ADM6996F pins are categorized into one of the following groups:
Section 2.2.1 Twisted Pair Interface
Section 2.2.2 5th Port (MII) Interfaces
Section 2.2.3 6th Port (MII) Interfaces
Section 2.2.4 LED Interface
Section 2.2.5 EEPROM/Management Interface
Section 2.2.6 Power/Ground, 48 pins
Section 2.2.7 Miscellaneous
Note:
“Section 1.6.2 Pin Types” can be used for reference.
2.2.1 Twisted Pair Interface
Pin Name
RXP[0:4]
Pin#
6, 14, 21, 29, 33
RXN[0:4]
7, 15, 22, 30, 32
TXP[0:4]
2, 10, 18, 25, 37
TXN[0:4]
3, 11, 19, 26, 36
Type
I/O,
Analog
I/O,
Analog
I/O,
Analog
I/O,
Analog
Descriptions
Twisted Pair Receive Input Positive.
Twisted Pair Receive Input Negative.
Twisted Pair Transmit Output Positive.
Twisted Pair Transmit Output Negative.
2.2.2 5th Port (MII) Interfaces
Pin Name
P4TXD[0]
Pin#
106
Setting
P4TYPE0
P4TXD[1]
105
Setting
P4TYPE1
P4TXD[3:2]
103, 104
Type
I/O,
8mA
PD
Descriptions
Port4 MII transmit data 0
Acts as MII transmit data TXD[0]. Synchronous to the rising
edge of TXCLK.
I/O,
8mA
PD
Setting
P4TYPE0 : At power-on-reset, latched as P4 TYPE0.
Port4 MII Transmit Data bit 1
Synchronous to the rising edge of TXCLK. These pins act
as MII TXD[1].
I/O,
8mA
PD
Setting
P4TYPE1 : At power-on-reset, latched as P4 TYPE1.
Port4 MII Transmit Data bit 3~2
Synchronous to the rising edge of TXCLK. These pins act
as MII TXD[3:2].
Infineon-ADMtek Co Ltd
2-2

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