ADM1075 Просмотр технического описания (PDF) - Analog Devices
Номер в каталоге
Компоненты Описание
производитель
ADM1075 Datasheet PDF : 52 Pages
| |||
Data Sheet
ADM1075
Parameter
Min
ADR PIN
Address Set to 00
0
Input Current for Address 00
−40
Address Set to 01
135
Address Set to 10
−1
Address Set to 11
2.1
Input Current for Address 11
SERIAL BUS DIGITAL INPUTS (SDAI/SDAO, SCL)
Input High Voltage, VIH
1.1
Input Low Voltage, VIL
Output Low Voltage, VOL
Input Leakage, ILEAK-PIN
−10
−5
Nominal Bus Voltage, VDD
2.7
Capacitive Load per Bus Segment, CBUS
Capacitance for SDAI, SDAO, or SCL Pin, CPIN
Input Glitch Filter, tSP
0
Typ Max
0.8
−22
150
165
+1
3
10
0.8
0.4
+10
+5
5.5
400
5
50
Unit Test Conditions/Comments
See Table 6
V
Connect to VEE
μA VADR = 0 V to 0.8 V
kΩ Resistor to VEE
μA No connect state; maximum leakage current allowed
V
Connect to VCAP
μA VADR = 2.0 V to VCAP; must not exceed the maximum
allowable current draw from VCAP
V
V
V
IOL = 4 mA, SDAO only
μA
μA Device is not powered
V
3 V to 5 V ±10%
pF
pF
ns
SERIAL BUS TIMING
Table 2.
Parameter
fSCLK
tBUF
tHD;STA
tSU;STA
tSU;STO
tHD;DAT
tSU;DAT
tLOW
tHIGH
tR2
tF
tOF
Description
Clock frequency
Bus free time
Start hold time
Start setup time
Stop setup time
SDA1 hold time
SDA1 setup time
SCL low time
SCL high time
SCL, SDA1 rise time
SCL, SDA1 fall time
SCL, SDA1 output fall time
Min
Typ
1.3
0.6
0.6
0.6
300
100
1.3
0.6
20
20
20 + 0.1 × CBUS
Max Unit Test Conditions/Comments
400 kHz
μs
μs
μs
μs
900 ns
ns
μs
μs
300 ns
300 ns
250 ns
1 SDAI and SDAO tied together.
2 tR = (VIL(MAX) – 0.15) to (VIH3V3 + 0.15) and tF = 0.9 VDD to (VIL(MAX) – 0.15); where VIH3V3 = 2.1 V, and VDD = 3.3 V.
SCL
VIH
VIL
SDA
VIH
VIL
P tBUF S
tLOW
tR
tF
tHD;DAT
tHD;STA
tHIGH
tSU;STA
tSU;DAT
S
Figure 2. Serial Bus Timing Diagram
tSU;STO
P
Rev. D | Page 9 of 52
Share Link: 