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ADM1041A Просмотр технического описания (PDF) - Analog Devices

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Компоненты Описание
производитель
ADM1041A Datasheet PDF : 56 Pages
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Parameter
Min
LOCAL VOLTAGE SENSE, VLS,
AND FALSE UV CLAMP
Input Voltage Range3
Stage Gain
False UV Clamp, VLS, Input Voltage Nominal, 1.3
and Trim Range
Clamp Trim Step
Clamp Trim Step
Local Overvoltage
1.9
Nominal and Trim Range
OV Trim Step
OV Trim Step
Noise Filter, for OVP Function Only
5
Local Undervoltage
1.3
Nominal and Trim Range
UV Trim Step
UV Trim Step
Noise Filter, for UVP Function Only
300
VOLTAGE ERROR AMPLIFIER, VCMP
Reference Voltage VREF_SOFT_START
1.49
Temperature Stability2
Long-Term Voltage Stability2
Soft-Start Period Range
0
Set Soft-Start Period
Unity Gain Bandwidth, GBW
Transconductance
1.9
Source Current
250
Sink Current
250
DIFFERENTIAL CURRENT SENSE INPUT,
CS−, CS+
Common-Mode Range
0
External Divider Tolerance Trim Range
(With Respect to Input)
External Divider Tolerance Trim Step Size
(With Respect to Input)
Typ
2.3
1.3
1.85
0.2
3.1
2.4
0.15
3.7
1.7
0.18
3.1
±100
±0.2
300
10
20
40
1
2.7
−5
−10
−20
5
10
20
20
39
78
Max
Unit
(VDD – 2) V
2.1
V
%
mV
2.85
V
%
mV
25
μs
2.1
V
%
mV
600
μs
1.51
V
μV/°C
%
40
ms
μs
ms
ms
ms
MHz
3.5
mA/V
μA
μA
(VDD – 2) V
mV
mV
mV
mV
mV
mV
μV
μV
μV
ADM1041A
Test Conditions/Comments
See Figure 9.
Set by external resistor divider.
At VLS = 1.8 V
VRANGE
8 bits, 255 steps, Reg 18h[7:0].
See Table 33.
VRANGE
8 bits, 255 steps Reg 0Ah[7:0].
See Table 19.
VRANGE
8 bits, 255 steps, Reg 09h[7:0]. See
Table 18.
See Figure 15.
TA = 25°C
−40°C ≤ TA ≤ 85°C
Over 1,000 hr, TJ = 125°C
Ramp is 7 bit, 127 steps
Reg 10h[3:2] = 00. See Table 25.
Reg 10h[3:2] = 01. See Table 25.
Reg 10h[3:2] = 10. See Table 25.
Reg 10h[3:2] = 11. See Table 25.
See Figure 11.
At IVCMP = ±180 μA
At VVCMP > 1 V
At VVCMP < VDD − 1 V
Reg 17h[7] = 0. See Table 18.
ISENSE mode. See Figure 13.
Set by external divider
Reg 16h[5:3] = 000. See Table 31.
Reg 16h[5:3] = 001. See Table 31.
Reg 16h[5:3] = 010. See Table 31.
Reg 16h[5:3] = 100. See Table 31.
Reg 16h[5:3] = 101. See Table 31.
Reg 16h[5:3] = 110. See Table 31.
VCM = 2.0 V
8 bits, 255 steps
Reg 14h[7:0]. See Table 29.
Rev. 0 | Page 7 of 56

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