ADM1041AARQZ Просмотр технического описания (PDF) - Analog Devices

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ADM1041AARQZ

Secondary-Side Controller with Current Share and Housekeeping

Analog Devices 

ADM1041A

Specification

CURRENT-SHARE DRIVER

Output Voltage

Short-Circuit Source Current

Source Current

Sink Current

I SHARE DIFFERENTIAL SENSE

Input Impedance

Gain

CURRENT-SHARE ERROR AMPLIFIER

Transconductance, SHRS to SCM

Output Source Current

Output Sink Current

Input Offset Voltage

Share OK Window Comp Threshold

CURRENT LIMIT

Lower Threshold

Upper Threshold

CURRENT-SHARE CAPTURE

Current Share Capture Range

Capture Threshold

FET OR GATE DRIVE

Output Low Level (On)

Output Leakage Current

REVERSE VOLTAGE COMPARATOR

Input Impedance

Reverse Turn-Off Threshold

Reverse Turn-On Threshold

ACSENSE1/ACSENSE2 COMPARATOR

Threshold Voltage

Threshold Adjust Range

Threshold Trim Step

Hysteresis Voltage

Hysteresis Adjust Range

Hysteresis Trim Step

Noise Filter

PULSE-IN

Threshold Voltage

Pulseok on delay

Pulseok off delay

OCP

OCP Threshold Voltage

OCP Shutdown Delay Time

OCP Fast Shutdown Delay Time

Test Name

VSHRO_1K

ISHRO_SHORT

ISHRO_SOURCE

ISHRO_SINK

RIN_SHR_DIFF

GSHR_DIFF

GmSCMP

ISOURCE_SCMP

ISINK_SCMP

VIN_SHR_OFF

VSHR_THRES

VCLIM_THRES_MIN

VCLIM_THRES_MAX

SHRCAPT_RANGE

VSHR_CAPT_THRES

VLO_FET

IOL_FET

RFS, RFD

VRVD_THRES_OFF

VRVD_THRES_ON

VSNSADJ_THRES

VSNSADJ_RANGE

VSNSADJ_STEP

VSNSHST

VSNSHYS_RANGE

VSNSHYS_STEP

TNFSNS

VPULSEMIN

TPULSEON

TPULSEOFF

VOCP_THRES

TOCP_SLOW

TOCP_FAST

Specification

MON1, MON2, MON3, MON4

Sense Voltage

Hysteresis

OVP Noise Filter

UVP Noise Filter

OTP (MON5)

Sense Voltage Range

OTP Trim Step

Hysteresis

OVP Noise Filter

UVP Noise Filter

PSON

Input Low Level

Input High Level

Debounce

PEN, DC_OK, CBD, AC_OK

Open-Drain N-Channel Option

Output Low Level = On

Open-Drain P-Channel Option?

Output High Level = On

Leakage Current

DC_OK, Off Delay

SMBus, SDL/SCL

Input Voltage Low

Input Voltage High

Output Voltage Low

Pull-Up Current

Leakage Current

SERIAL BUS TIMING

Clock Frequency

Glitch Immunity

Bus Free Time

Start Setup Time

Start Hold Time

SCL Low Time

SCL Low Time

SCL High Time

SCL, SDA Rise Time

SCL, SDA Fall Time

Data Setup Time

Data Hold Time

Test Name

VMON1

VMON1_HST

TNFOVP_MON1

TNFUVP_MON1

VOTP_RANGE

VOTP_STEP

IOTP_HST

TNFOVP_OTP

TNFUVP_OTP

VIL_PSON

VIH_PSON

TNF_PSON

VOL_PEN

VOH_PEN

IOH_PEN

TDCOK_OFF

VIL

VIH

VOL

IPULLUP

ILEAK

fSCLK

tSW

tBUF

tSU;STA

tHD;STA

tLOW

tLOW

tHIGH

tr

tf

tSU;DAT

tHD;DAT

Rev. 0 | Page 52 of 56

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