ADM1034ARQZ Просмотр технического описания (PDF) - Analog Devices

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производитель

ADM1034ARQZ

Thermal Monitor and Fan Speed (RPM) Controller

Analog Devices 

ADM1034

Parameter

ANALOG INPUTS

(LOCATION, REF)

Input Resistance

AGTL + INPUT

(THERM)

Input High Level

Input Low Level

TACHOMETER ACCURACY

Fan Speed Measurement Accuracy

SERIAL BUS TIMING4

Clock Frequency, fSCLK

Glitch Immunity, tSW

Bus Free Time, tBUF

Start Setup Time, tSU:STA

Start Hold Time, tHD:STA

Stop Condition Setup Time tSU:STO

SCL Low Time, tLOW

SCL High Time, tHIGH

SCL, SDA Rise Time, tr

SCL, SDA Fall Time, tf

Data Setup Time, tSU:DAT

Detect Clock Low Timeout, tTIMEOUT

Min

Typ

Max

Unit

Test Conditions/Comments

80

125

160

kΩ

0.75 ×

V

REF

0.4

V

±4

%

50

1.3

0.6

0.6

0.6

1.3

0.6

100

25

400

kHz

ns

µs

µs

µs

µs

µs

µs

1000

ns

300

ns

ns

35

ms

See Figure 2

See Figure 2

See Figure 2

See Figure 2

See Figure 2

See Figure 2

See Figure 2

See Figure 2

See Figure 2

See Figure 2

See Figure 2

See Note 5

1 Typicals are at TA = 25°C and represent most likely parametric norm. Standby current typ is measured with VCC = 3.3 V. Timing specifications are tested at logic levels of

VIL = 0.8 V for a falling edge and VIH = 2.1 V for a rising edge.

2 Operation at 5.5 V is guaranteed by design, not production tested.

3 Recommend use of 100 kΩ pull-up resistors for all open-drain outputs from the ADM1034.

4 Guaranteed by design, not production tested.

5 SMBus timeout disabled by default. See the SMBUS section for more information.

SCL

tLOW tR

tHD:STA

tHD:DAT

SDA

tBUF

P

S

tF

tHIGH

tSU:DAT

tHD:STA

tSU:STA

S

Figure 2. Serial Bus Timing Diagram

tSU:STO

P

Rev. 0 | Page 5 of 40

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