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ADM1033ARQ-REEL7 Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге
Компоненты Описание
производитель
ADM1033ARQ-REEL7
ADI
Analog Devices ADI
ADM1033ARQ-REEL7 Datasheet PDF : 40 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADM1033
Parameter
TACHOMETER ACCURACY
Fan Speed Measurement Accuracy
AGTL + INPUT (THERM)
Input High Level
Input Low Level
SERIAL BUS TIMING3
Clock Frequency, fSCLK
Glitch Immunity, tSW
Bus Free Time, tBUF
Start Setup Time, tSU:STA
Start Hold Time, tHD:STA
Stop Condition Setup Time, tSU:STO
SCL Low Time, tLOW
SCL High Time, tHIGH
SCL, SDA Rise Time, tr
SCL, SDA Fall Time, tf
Data Setup Time, tSU:DAT
Detect Clock Low Timeout, tTIMEOUT
Min Typ
Max Units
±4
%
0.75 × REF
V
0.4
V
50
1.3
0.6
0.6
0.6
1.3
0.6
100
25
400 kHz
ns
µs
µs
µs
µs
µs
µs
1000 ns
300 ns
ns
35
ms
Test Conditions/Comments
See Figure 2
See Note 4
1 Typicals are at TA = 25°C and represent most likely parametric norm. Standby current typ is measured with VCC = 3.3 V. Timing specifications are tested at logic levels of
VIL = 0.8 V for a falling edge and VIH = 2.1 V for a rising edge.
2 Operation at 5.5 V is guaranteed by design, not production tested.
3 Guaranteed by design, not production tested.
4 SMBus timeout disabled by default. See the SMBus Timeout section for more information.
SCL
tLOW tR
tHD:STA
tHD:DAT
SDA
tBUF
P
S
tF
tHIGH
tSU:DAT
tHD:STA
tSU:STA
S
Figure 2. Serial Bus Timing Diagram
tSU:STO
P
Rev. 0 | Page 5 of 40

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