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ADL5521 Просмотр технического описания (PDF) - Analog Devices

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ADL5521 Datasheet PDF : 6 Pages
1 2 3 4 5 6
ADL5521
PIN CONFIGURATION AND FUNCTIONAL DESCRIPTIONS
Preliminary Technical Data
1 VBIAS
VDD 8
2 INP ADL5521 OUT 7
top view
3 NC (not to scale) NC 6
4 NC
Exposed pad
NC 5
Figure 2. 8-Lead LFCSP
Pin No.
1
2
3,4,5,6
7
8
Exposed pad
Table 3. Pin Function Descriptions- 8Lead CSP
Mnemonic
Description
VBIAS
Bias: Internal DC bias
INP
RF Input: Must be AC-coupled.
NC
NC: No internal connection
OUT
RF Output: Must be AC-coupled.
VDD
Supply: VDD bias needs to be bypassed to ground using
low-inductance capacitors.
EP
Exposed Paddle: Connect to a low impedance ground plane
Rev. PrA | Page 4 of 6

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