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ADL5372 Просмотр технического описания (PDF) - Analog Devices

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ADL5372 Datasheet PDF : 24 Pages
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ADL5372
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
Data Sheet
COM1 1
COM1 2
VPS1 3
VPS1 4
VPS1 5
VPS1 6
ADL5372
TOP VIEW
(Not to Scale)
18 VPS5
17 VPS4
16 VPS3
15 VPS2
14 VPS2
13 VOUT
NOTES
1. EXPOSED PAD. CONNECT TO A GROUND
PLANE VIA A LOW IMPEDANCE PATH.
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No.
Mnemonic
Description
1, 2, 7, 10 to COM1 to COM4 Input Common Pins. Connect to ground plane via a low impedance path.
12, 21, 22
3 to 6, 14
to 18
VPS1 to VPS5
Positive Supply Voltage Pins. All pins should be connected to the same supply (VS). To ensure adequate
external bypassing, connect 0.1 μF capacitors between each pin and ground. Adjacent power supply pins
of the same name can share one capacitor (see Figure 25).
8, 9
LOIP, LOIN
50 Ω Single-Ended Local Oscillator Input. Internally dc-biased. Pins must be ac-coupled. AC-couple LOIN
to ground and drive LO through LOIP.
13
VOUT
Device Output. Single-ended RF output. Pin should be ac-coupled to the load. The output is ground
referenced.
19, 20,
23, 24
IBBP, IBBN,
QBBN, QBBP
Differential In-Phase and Quadrature Baseband Inputs. These high impedance inputs must be dc-biased
to 500 mV dc and must be driven from a low impedance source. Nominal characterized ac signal swing is
700 mV p-p on each pin. This results in a differential drive of 1.4 V p-p with a 500 mV dc bias. These inputs
are not self-biased and must be externally biased.
EPAD
Exposed Pad. Connect to a ground plane via a low impedance path.
Rev. A | Page 6 of 24

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