ADIS16223 Просмотр технического описания (PDF) - Analog Devices

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ADIS16223

Digital Tri-Axial Vibration Sensor

Analog Devices 

ADIS16223

Data Sheet

DATA COLLECTION

Table 10. Output Data/User Access Register Summary

The ADIS16223 samples and stores acceleration (vibration) data

Register

Lower Byte

using capture events. A capture event involves several sampling/

Name

Address

Measurement

Format

processing operations, as shown in Figure 13. First, the ADIS16223

CAPT_SUPPLY 0x0A

Power supply

Table 12

produces and stores 1024 samples of acceleration data into the

CAPT_TEMP 0x0C

Internal temperature Table 13

capture buffers. Second, the capture event takes a 5.12 ms record

CAPT_PEAKX 0x0E

Peak acceleration, X Table 11

of power supply measurements at a sample rate of 50 kHz and

CAPT_PEAKY 0x10

Peak acceleration, Y Table 11

loads the average of this record into the CAPT_SUPPLY register.

CAPT_PEAKZ 0x12

Peak acceleration, Z Table 11

Third, the capture event takes 64 samples of internal temperature

CAPT_BUFFX 0x14

Acceleration, X

Table 11

data over a period of 1.7 ms and loads the average of this record

CAPT_BUFFY 0x16

Acceleration, Y

Table 11

into the CAPT_TEMP register.

CAPT_BUFFZ 0x18

Acceleration, Z

Table 11

DATA IN BUFFERS LOAD INTO

USER OUTPUT REGISTERS

CAPT_BUFFX

E 0

T CAPT_PNTR

X-AXIS

CAPTURE

BUFFER

Y-AXIS

CAPTURE

BUFFER

Z-AXIS

CAPTURE

BUFFER

1023

CAPT_BUFFY

CAPT_BUFFZ

TRIPLE-CHANNEL

CAPTURE BUFFER

1024 SAMPLES

EACH

16-BIT DATA

E CAPT_SUPPLY

INTERNAL SAMPLING SYSTEM FILLS THE CAPTURE

BUFFER AND OUTPUT REGISTERS

CAPT_TEMP

L Figure 13. Capture Buffer Structure and Operation

READING DATA FROM THE CAPTURE BUFFER

When a capture is complete, the first data samples load into the

CAPT_BUFFx registers and 0x0000 loads into the index pointer

O (CAPT_PNTR). The index pointer determines which data samples

load into the CAPT_BUFFx registers. For example, writing 0x0138

to the CAPT_PNTR register (DIN = 0x9A38, DIN = 0x9B01)

S causes the 313th sample in each buffer memory to load into the

CAPT_BUFFx registers.

Table 9. CAPT_PNTR Bits Descriptions

B Bits

Description (Default = 0x0000)

[15:10]

Reserved

[9:0]

Data bits

O The index pointer increments with every CAPT_BUFFx read

CAPT_PNTR 0x1A

Capture data pointer Table 9

Output Data Format

The acceleration and peak acceleration output registers use a

16-bit, twos complement digital format, with a bit weight of

4.768 mg/LSB. The CAPT_PEAKx registers reflect the largest

deviation from 0 g, assuming zero offset error, and can be either

negative or positive. The CAPT_SUPPLY and CAPT_TEMP

use a 12-bit, offset-binary digital format, with bit weights of

+1.2207 mV/LSB and −0.47°C/LSB, respectively.

Output Data Format Examples

Table 11, Table 12, and Table 13 provide numerous digital coding

examples for each output register data format.

Table 11. Acceleration Data Format Examples

Acceleration (g) LSB

Hex

Binary

+70

+14681 0x3959 0011 1001 0101 1001

+1

+210 0x00D2 0000 0000 1101 0010

+0.004768

+1

0x0001 0000 0000 0000 0001

0

0

0x0000 0000 0000 0000 0000

−0.004768

−1

0xFFFF 1111 1111 1111 1111

−1

−210 0xFF2E 1111 1111 0010 1110

−70

−14681 0xC6A7 1100 0110 1010 0111

Table 12. Power Supply Data Format Examples

Supply Level (V) LSB

Hex

Binary

3.6

2949 0xB85 1011 1000 0101

3.3 + 0.0012207 2704 0xA90 1010 1001 0000

3.3

2703 0xA8F 1010 1000 1111

3.3 − 0.0012207 2702 0xA8E 1010 1000 1110

3.15

2580 0xA14 1010 0001 0100

command, which causes the next set of capture data to load into

each capture buffer register, automatically.

OUTPUT DATA REGISTERS

Table 13. Internal Temperature Data Format Examples

Temperature (°C) LSB

Hex

Binary

125

1065 0x429 0100 0010 1001

The ADIS16223 output registers provide access to the following data

25 + 0.47

1277 0x4FD 0100 1111 1101

taken during a capture event: acceleration data, peak acceleration

25

1278 0x4FE 0100 1111 1110

data, power supply, and internal temperature. Table 10 provides

25 − 0.047

1279 0x4FF 0100 1111 1111

a list of the output data and pointer registers, along with their

0

1331 0x533 0101 0011 0011

lower byte addresses.

−40

1416 0x588 0101 1000 1000

Rev. A | Page 10 of 20

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