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ADF7021BCPZ-RL Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге
Компоненты Описание
производитель
ADF7021BCPZ-RL
ADI
Analog Devices ADI
ADF7021BCPZ-RL Datasheet PDF : 64 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADF7021
Data Sheet
Parameter
LNA INPUT IMPEDANCE
fRF = 915 MHz
fRF = 868 MHz
fRF = 450 MHz
fRF = 426 MHz
fRF = 315 MHz
fRF = 175 MHz
Min Typ
Max
24 − j60
26 − j63
63 − j129
68 − j134
96 − j160
178 − j190
Unit Test Conditions/Comments
RFIN to RFGND
1 Calibration of the image rejection used an external RF source.
2 For received signal levels < −100 dBm, it is recommended to average the RSSI readback value over a number of samples to improve the RSSI accuracy at low input powers.
3 Filtered conductive receive spurious emissions measured on the EVAL-ADF7021DBx, which includes a T-stage harmonic filter (two inductors and one capacitor).
DIGITAL SPECIFICATIONS
Table 4.
Parameter
Min
Typ
Max
Unit Test Conditions/Comments
TIMING INFORMATION
Chip Enabled to Regulator Ready
10
µs CREG = 100 nF
Chip Enabled to Tx Mode
32-bit register write time = 50 µs
TCXO Reference
1
ms
XTAL
2
ms
Chip Enabled to Rx Mode
32-bit register write time = 50 µs, IF filter coarse
calibration only
TCXO Reference
1.2
ms
XTAL
2.2
ms
Tx to Rx Turnaround Time
300 µs + (5 × tBIT)
Time to synchronized data out, includes AGC
settling and CDR synchronization; see AGC
Information and Timing section for more details;
tBIT = data bit period
LOGIC INPUTS
Input High Voltage, VINH
0.7 × VDD
V
Input Low Voltage, VINL
0.2 × VDD V
Input Current, IINH/IINL
±1
µA
Input Capacitance, CIN
10
pF
Control Clock Input
50
MHz
LOGIC OUTPUTS
Output High Voltage, VOH
DVDD − 0.4
V
IOH = 500 µA
Output Low Voltage, VOL
0.4
V
IOL = 500 µA
CLKOUT Rise/Fall
5
ns
CLKOUT Load
10
pF
Rev. B | Page 10 of 64

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