ADF4108S Просмотр технического описания (PDF) - Analog Devices

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ADF4108S

PLL Frequency Synthesizer

Analog Devices 

ADF4108S

TABLE IIA – ELECTRICAL TEST REQUIREMENTS:

Table IIA

Test Requirements

Subgroups (in accordance with

MIL-PRF-38535, Table III)

Interim Electrical Parameters

1

Final Electrical Parameters

1, 2, 3, 4, 5, 6 ,9,10,11 1/ 2/ 3/

Group A Test Requirements

1, 2, 3, 4, 5, 6 ,9,10,11

Group C end-point electrical parameters

1, 2, 3, 4, 5, 6 ,9,10,11 2/

Group D end-point electrical parameters

1, 2, 3, 4, 5, 6 ,9,10,11

Group E end-point electrical parameters

1, 4, 9

Table IIA Notes:

1/ PDA apply to subgroup 1 only. Delta's are not excluded from PDA.

2/ See Table IIB for delta parameters.

3/ Parameters marked with note 2/ in Table I are part of device initial characterization which is only repeated after design and

process changes or with subsequent wafer lots.

TABLE IIB – BURN-IN/GROUP C DELTA LIMITS 1/

Parameters

IDD Supply Current

ICP Supply Current

Rset Vout

Vcp Current, max level

Vcp Current, min level

Symbol

IDD

ICP

VRSET

Icp8

Icp1

Condition

VDD = 3.6 V, Vcp = 5.5 V

VDD = 3.6 V, Vcp = 5.5 V

VDD = 3.2 V, Vcp = 5.5 V

VDD = 3.3 V, Vcp = 5.5 V

VDD = 3.3 V, Vcp = 5.5 V

Delta limits

+/- 0.4

+/- 0.05

+/- 0.06

+/- 0.35

+/- 0.08

1/ Conditions match Table I unless otherwise noted.

Units

mA

mA

V

mA

mA

ASD0016548 Rev. A | Page 8 of 21

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