ADCMP573BCPZ-R2(RevB) Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге

Компоненты Описание

производитель

ADCMP573BCPZ-R2
(Rev.:RevB)

Ultrafast 3.3 V/5 V Single-Supply SiGe Comparators

Analog Devices 

ADCMP572/ADCMP573

VCCO is the signal return for the output stage and VCCO pins

should of course be connected to a supply plane for maximum

performance.

OPTIMIZING HIGH SPEED PERFORMANCE

As with any high speed comparator, proper design and layout

techniques are essential to obtaining the specified performance.

Stray capacitance, inductance, inductive power and ground

impedances, or other layout issues can severely limit performance

and often cause oscillation. Discontinuities along input and

output transmission lines can severely limit the specified pulse

width dispersion performance.

For applications working in a 50 Ω environment, input and

output matching has a significant impact on data dependent (or

deterministic) jitter (DJ) and on pulse width dispersion

performance. The ADCMP572/ADCMP573 comparators

provide internal 50 Ω termination resistors for both the VP and

VN inputs, and the ADCMP572 provides 50 Ω back terminated

outputs. The return side for each input termination is pinned

out separately with the VTP and VTN pins, respectively. If a 50 Ω

termination is desired at one or both of the VP/VN inputs, then

the VTP and VTN pins can be connected (or disconnected) to

(from) the desired termination potential as required. The

termination potential should be carefully bypassed using high

quality bypass capacitors as discussed earlier to prevent undesired

aberrations on the input signal due to parasitic inductance in

the circuit board layout. If a 50 Ω input termination is not

desired, either one or both of the VTP/VTN termination pins can

be left disconnected. In this case, the pins should be left floating

with no external pull-downs or bypassing capacitors.

When leaving an input termination disconnected, the internal

resistor acts as a small stub on the input transmission path and

can cause problems for very high speed inputs. Reflections

should then be expected from the comparator inputs because

they no longer provide matched impedance to the input path

leading to the device. In this case, it is important to back match

the drive source impedance to the input transmission path to

minimize multiple reflections. For applications in which the

comparator is very close to the driving signal source, the source

impedance should be minimized. High source impedance in

combination with parasitic input capacitance of the comparator

might cause an undesirable degradation in bandwidth at the

input, therefore degrading the overall response. Although the

ADCMP572/ADCMP573 comparators have been designed to

minimize input capacitance, some parasitic capacitance is

inevitable. It is therefore recommended that the drive source

impedance be no more than 50 Ω for best high speed performance.

Data Sheet

COMPARATOR PROPAGATION

DELAY DISPERSION

The ADCMP572/ADCMP573 comparators are designed to

reduce propagation delay dispersion over a wide input overdrive

range of 5 mV to 500 mV. Propagation delay dispersion is variation

in the propagation delay that results from a change in the degree of

overdrive or slew rate (how far or how fast the input signal

exceeds the switching threshold).

Propagation delay dispersion is a specification that becomes

important in high speed, time-critical applications such as data

communication, automatic test and measurement, instrumenta-

tion, and event driven applications such as pulse spectroscopy,

nuclear instrumentation, and medical imaging. Dispersion is

defined as the variation in propagation delay as the input over-

drive conditions vary (Figure 17 and Figure 18). For the

ADCMP572/ADCMP573, dispersion is typically <15 ps

because the overdrive varies from 10 mV to 500 mV, and the

input slew rate varies from 2 V/ns to 10 V/ns. This specification

applies for both positive and negative signals since the

ADCMP572/ADCMP573 has substantially equal delays for

either positive going or negative going inputs.

500mV OVERDRIVE

INPUT VOLTAGE

10mV OVERDRIVE

VN ± VOS

Q/Q OUTPUT

DISPERSION

Figure 17. Propagation Delay—Overdrive Dispersion

INPUT VOLTAGE

1V/ns

10V/ns

VN ± VOS

Q/Q OUTPUT

DISPERSION

Figure 18. Propagation Delay—Slew Rate Dispersion

Rev. B | Page 10 of 14

Share Link: