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AD9985A Просмотр технического описания (PDF) - Analog Devices

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AD9985A Datasheet PDF : 32 Pages
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AD9985A
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
GND 1
GREEN <7> 2
GREEN <6> 3
GREEN <5> 4
GREEN <4> 5
GREEN <3> 6
GREEN <2> 7
GREEN <1> 8
GREEN <0> 9
GND 10
VDD 11
BLUE <7> 12
BLUE <6> 13
BLUE <5> 14
BLUE <4> 15
BLUE <3> 16
BLUE <2> 17
BLUE <1> 18
BLUE <0> 19
GND 20
PIN 1
AD9985A
TOP VIEW
(Not to Scale)
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
60 GND
59 VD
58 REF BYPASS
57 SDA
56 SCL
55 A0
54 RIN
53 GND
52 VD
51 VD
50 GND
49 SOGIN
48 GIN
47 GND
46 VD
45 VD
44 GND
43 BIN
42 VD
41 GND
Table 4. Complete Pinout List
Pin Type
Mnemonic
Inputs
RIN
GIN
BBIN
HSYNC
VSYNC
SOGIN
CLAMP
COAST
Outputs
Red [7:0]
Green [7:0]
Blue [7:0]
DATACK
HSOUT
VSOUT
SOGOUT
References
REF BYPASS
MIDSCV
FILT
Figure 2. Pin Configuration
Function
Analog Input for Converter R
Analog Input for Converter G
Analog Input for Converter B
Horizontal SYNC Input
Vertical SYNC Input
Input for Sync-on-Green
Clamp Input (External Clamp Signal)
PLL Coast Signal Input
Outputs of Converter Red, Bit 7 is the MSB
Outputs of Converter Green, Bit 7 is the MSB
Outputs of Converter Blue, Bit 7 is the MSB
Data Output Clock
HSYNC Output (Phase-Aligned with DATACK)
VSYNC Output (Phase-Aligned with DATACK)
Sync-on-Green Slicer Output
Internal Reference Bypass
Internal Midscale Voltage Bypass
Connection for External Filter Components
for Internal PLL
Value
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
1.25 V
Pin No.
54
48
43
30
31
49
38
29
70 to 77
2 to 9
12 to 19
67
66
64
65
58
37
33
Rev. 0 | Page 8 of 32

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