AD9956 Просмотр технического описания (PDF) - Analog Devices
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Компоненты Описание
производитель
AD9956 Datasheet PDF : 32 Pages
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Parameter
Min
Latencies/Pipeline Delays7
I/O Update to DAC Frequency Change
I/O Update to DAC Phase Change
PS<2:0> to DAC Frequency Change
PS<2:0> to DAC Phase Change
I/O Update to CP_OUT Scaler Change
I/O Update to Frequency Accumulator
Step Size Change
I/O Update to Frequency Accumulator
Ramp Rate Change
RF DIVIDER/CML DRIVER EQUIVALENT
INTRINSIC TIME JITTER
FIN = 414.72 MHz, FOUT = 51.84 MHz
BW = 12 kHz −> 400 kHz
FIN = 1244.16 MHz, FOUT = 155.52 MHz
BW = 12 kHz −> 1.3 MHz
FIN = 2488.32 MHz, FOUT = 622.08 MHz
BW = 12 kHz −> 5 MHz
RF DIVIDER/CML DRIVER RESIDUAL PHASE NOISE
FIN = 157.6 MHz, FOUT = 19.7 MHz
@ 10 Hz
@ 100 Hz
@ 1 kHz
@ 10 kHz
@ 100 kHz
> 1 MHz
FIN = 1240 MHz, FOUT = 155 MHz
@ 10 Hz
@ 100 Hz
@ 1 kHz
@ 10 kHz
@ 100 kHz
@ 1 MHz
>3 MHz
FIN = 2488MHz, FOUT = 622 MHz
@ 10 Hz
@ 100 Hz
@ 1 kHz
@ 10 kHz
@ 100 kHz
@ 1 MHz
>3 MHz
TOTAL SYSTEM TIME JITTER FOR 622 MHz CLOCK
12 kHz to 5 MHz Bandwidth
Typ Max
33
33
29
29
4
4
4
136
101
108
−115
−126
−134
−143
−150
−151
−111
−122
−129
−138
−146
−150
−153
−97
−110
−120
−126
−136
−141
−144
0.7
AD9956
Unit
Test Conditions/Comments
SYSCLK Cycles
SYSCLK Cycles
SYSCLK Cycles
SYSCLK Cycles
SYSCLK Cycles
SYSCLK Cycles
SYSCLK Cycles
fS rms
fS rms
fS rms
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
dBc/Hz
ps rms
OC1, RF Divider R = 8
OC3, RF Divider R = 8
OC12, RF Divider R = 4
RF Divider R = 8
RF Divider R = 8
RF Divider R = 4
See the Loop Measurement Condi-
tions section
Rev. B | Page 7 of 32
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