AD9923A Просмотр технического описания (PDF) - Analog Devices
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AD9923A Datasheet PDF : 84 Pages
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AD9923A
SPECIFICATIONS
Table 1.
Parameter
TEMPERATURE RANGE
Operating
Storage
AFETG POWER SUPPLY VOLTAGES
AVDD
TCVDD
RGVDD
HVDD
DRVDD
DVDD
V-DRIVER POWER SUPPLY
VOLTAGES
VDD1, VDD2
VH1, VH2
VL1, VL2
VM1, VM2
VLL
VMM
AFETG POWER DISSIPATION
Total
Standby 1 Mode
Standby 2 Mode
Standby 3 Mode
Power from HVDD Only1
Power from RGVDD Only
Power from AVDD Only
Power from TCVDD Only
Power from DVDD Only
Power from DRVDD Only
V-DRIVER POWER DISSIPATION2
VH1, VH2
VL1, VL2
VM1, VM2
VDD1, VDD2
MAXIMUM CLOCK RATE (CLI)
Conditions/Comments
AFE analog supply
Timing Core Analog Supply
RG Driver
HL, H1 to H4 Drivers
Data Output Drivers
Digital
V-Driver Logic
V-Driver High Supply
V-Driver Low Supply
V-Driver Mid Supply
SUBCK Low Supply
SUBCK Mid Supply
36 MHz, 3.0 V supply, 400 pF total H-load, 20 pF RG load
VH1, VH2 = +15 V; VL1, VL2 = −7.5 V; VM1, VM2 = 0 V; VDD1, VDD2 =
3.3 V; all V-driver inputs tied low
Min Typ Max Unit
−25
+85 °C
−65
+150 °C
2.7 3.0 3.6 V
2.7 3.0 3.6 V
2.7 3.0 3.6 V
2.7 3.0 3.6 V
2.7 3.0 3.6 V
2.7 3.0 3.6 V
+2.7 +3.0 +3.6 V
+11.5 +15.0 +16.5 V
−8.5 −7.5 −5.5 V
−1.5 0.0 +1.5 V
−8.5 −7.5 −5.5 V
−4.0 0.0 +1.5 V
335
mW
105
mW
1
mW
1
mW
130
mW
10
mW
75
mW
40
mW
75
mW
5
mW
5
mW
2.5
mW
0
mW
0.5
mW
36
MHz
1 The total power dissipated by the HVDD supply can be approximated using the equation
Total HVDD Power = [CLOAD × HVDD × Pixel Frequency] × HVDD
Reducing the H-load and/or using a lower HVDD supply reduces the power dissipation. CLOAD is the total capacitance seen by all H-outputs.
2 V-driver power dissipation depends on the frequency of operation and the load they are driving. All inputs to the V-driver were tied low for the
measurements in Table 1.
Rev. A | Page 3 of 84
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