AD9882 Просмотр технического описания (PDF) - Analog Devices
Номер в каталоге
Компоненты Описание
производитель
AD9882 Datasheet PDF : 36 Pages
| |||
AD9882
PIN DESCRIPTIONS OF SHARED PINS BETWEEN
ANALOG AND DIGITAL INTERFACES
HSOUT
Horizontal Sync Output
A reconstructed and phase-aligned version of the
video Hsync. The polarity of this output can be
controlled via a serial bus bit. In analog interface
mode, the placement and duration are variable.
In digital interface mode, the placement and
duration are set by the graphics transmitter.
VSOUT
Vertical Sync Output
The separated Vsync from a composite signal or
a direct pass-through of the Vsync input. The
polarity of this output can be controlled via a
serial bus bit. The placement and duration in all
modes is set by the graphics transmitter.
DATA OUTPUTS
RED
Data Output, RED Channel
GREEN
Data Output, GREEN Channel
BLUE
Data Output, BLUE Channel
The main data outputs. Bit 7 is the MSB. These
outputs are shared between the two interfaces
and behave according to which interface is active.
Refer to the sections on the two interfaces for
more information on how these outputs behave.
DATACK
Data Output Clock
Just like the data outputs, the data clock output
is shared between the two interfaces. It behaves
differently depending on which interface is active.
Refer to the sections on the two interfaces to
determine how this pin behaves.
SERIAL PORT (2-WIRE)
SDA
Serial Port Data I/O
SCL
Serial Port Data Clock
A0
Serial Port Address Input
For a full description of the 2-wire serial register,
refer to the Control Port section on 2-Wire
Serial Control.
Pin Type
Analog Video
Inputs
External
Sync/Clock
Sync Outputs
Voltage
Reference
Clamp Voltages
PLL Filter
Power Supply
Table II. Analog Interface Pin List
Mnemonic
RAIN
GAIN
BAIN
HSYNC
VSYNC
SOGIN
HSOUT
VSOUT
SOGOUT
REFBYPASS
MIDBYPASS
Function
Analog Input for Converter R
Analog Input for Converter G
Analog Input for Converter B
Horizontal SYNC Input
Vertical SYNC Input
Sync-on-Green Input
Hsync Output (Phase-Aligned with DATACK)
Vsync Output
Composite SYNC
Internal Reference Bypass
Internal Midscale Voltage Bypass
FILT
VD
PVD
VDD
GND
Connection for External Filter Components for Internal PLL
Main Power Supply
PLL Power Supply (Nominally 3.3 V)
Output Power Supply
Ground
Value
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
1.25 V
Pin
Number
70
65
59
79
80
64
88
87
89
73
74
48
3.15 V to 3.45 V
3.15 V to 3.45 V
2.2 V to 3.6 V
0V
REV. A
–9–
Share Link: 