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AD9877ABS Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге
Компоненты Описание
производитель
AD9877ABS Datasheet PDF : 37 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin No.
59
62
66
69
73
74, 77, 80
83, 88, 91, 96, 99
4:15
16:19
20
23
26
27:32
35, 36
37
41
42
43
44
47
48
49
51, 52
57
60
61
63
64
65
67
68
71
75, 76, 89, 90, 100
78, 79
81, 82
85
86
93
94
97, 98
Mnemonic
DGNDOSC
DVDDOSC
DVDDSD
DGNDSD
AVDDIQ
AGNDIQ
AGND
IF[11:0]
RxIQ[3:0]
RxSYNC
MCLK
TxSYNC
TxIQ[5:0]
PROFILE[1:0]
RESET
SCLK
CS
SDIO
SDO
PWRDN
REFIO
FSADJ
Tx−, Tx+
PLLFILT
XTAL
OSCIN
CA_CLK
CA_DATA
CA_EN
SDELTA1
SDELTA0
REFCLK
NC
I IN−, I IN+
Q IN−, Q IN+
REFB8
REFT8
REFB12
REFT12
IF12−, IF12+
Description
Oscillator Digital Ground.
Oscillator Digital 3.3 V Supply.
Σ-Δ Digital 3.3 V Supply.
Σ-Δ Digital Ground.
8-Bit ADC Analog 3.3 V Supply.
8-Bit ADC Analog Ground.
12-Bit ADC Analog Ground.
12-Bit ADC Digital Output.
Muxed I and Q ADC Output.
Sync Output, IF, I, and Q ADCs.
Master Clock Output.
Sync Input for Transmit Port.
Digital Input for Transmit Port.
Profile Selection Inputs.
Chip Reset Input.
SPORT Clock.
SPORT Chip Select.
SPORT Data I/O.
SPORT Data Output.
Power-Down Transmit Path.
TxDAC Decoupling (to AGND).
DAC Output Adjust (External Resistor).
Tx Path Complementary Outputs.
PLL Loop Filter Connection.
Crystal Oscillator Inverse Output.
Oscillator Clock Input.
Serial Clock to Cable Driver.
Serial Data to Cable Driver.
Serial Enable to Cable Driver.
Σ-Δ Output Stream1.
Σ-Δ Output Stream0.
Programmable Reference Clock Output.
No Connect (Leave Floating).
Differential Input to I ADC.
Differential Input to Q ADC.
8-Bit ADC Decoupling Node.
8-Bit ADC Decoupling Node.
12-Bit ADC Decoupling Node.
12-Bit ADC Decoupling Node.
Differential Input to IF ADC.
AD9877
Rev. B | Page 9 of 36

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