AD9866 Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге

Компоненты Описание

производитель

AD9866

Broadband Modem Mixed Signal Front End

Analog Devices 

AD9866

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

64 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49

ADIO11/Tx[5] 1

ADIO10/Tx[4] 2

ADIO9/Tx[3] 3

ADIO8/Tx[2] 4

ADIO7/Tx[1] 5

ADIO6/Tx[0] 6

ADIO5/Rx[5] 7

ADIO4/Rx[4] 8

ADIO3/Rx[3] 9

ADIO2/Rx[2] 10

ADIO1/Rx[1] 11

ADIO0/Rx[0] 12

RXEN/RXSYNC 13

TXEN/TXSYNC 14

TXCLK/TXQUIET 15

RXCLK 16

PIN 1

IDENTIFIER

AD9866

TOP VIEW

(Not to Scale)

48 AVSS

47 AVSS

46 IOUT_N–

45 IOUT_G–

44 AVSS

43 AVDD

42 REFIO

41 REFADJ

40 AVDD

39 AVSS

38 RX+

37 RX–

36 AVSS

35 AVDD

34 AVSS

33 REFT

17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

Table 9. Pin Function Descriptions

Pin No.

Mnemonic

1

ADIO11

Tx[5]

2–5

ADIO10–7

Tx[4–1]

6

ADIO6

Tx[0]

7

ADIO5

Rx[5]

8, 9

ADIO4–3

Rx[4–3]

10

ADIO2

Rx[2]

11

ADIO1

Rx[1]

12

ADIO0

Rx[0]

13

RXEN

RXSYNC

14

TXEN

TXSYNC

15

TXCLK

TXQUIET

Figure 2. Pin Configuration

Mode1

HD

FD

HD

FD

HD

FD

HD

FD

HD

FD

HD

FD

HD

FD

HD

FD

HD

FD

HD

FD

HD

FD

Pin Function

MSB of ADIO Buffer

MSB of Tx Nibble Input

Bits 10–7 of ADIO Buffer

Bits 4–1 of Tx Nibble Input

Bit 6 of ADIO Buffer

LSB of Tx Nibble Input

Bit 5 of ADIO Buffer

MSB of Rx Nibble Output

Bits 4–3 of ADIO Buffer

Bits 4–3 of Rx Nibble Output

Bit 2 of ADIO Buffer

Bit 2 of Rx Nibble Output

Bit 1 of ADIO Buffer

Bit 1 of Rx Nibble Output

LSB of ADIO Buffer

LSB of Rx Nibble Output

ADIO Buffer Control Input

Rx Data Synchronization Output

Tx Path Enable Input

Tx Data Synchronization Input

ADIO Sample Clock Input

Fast TxDAC/IAMP Power-Down

Rev. 0 | Page 10 of 48

Share Link: