AD9826 Просмотр технического описания (PDF) - Analog Devices
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AD9826 Datasheet PDF : 20 Pages
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AD9826–SPECIFICATIONS
ANALOG SPECIFICATIONS (TMIN to TMAX, AVDD = 5 V, DRVDD = 5 V, CDS Mode, fADCCLK = 15 MHz, fCDSCLK1 = fCDSCLK2 = 5 MHz, PGA
Gain = 1, Input range = 4 V p-p, unless otherwise noted.)
Parameter
Min
Typ
Max
MAXIMUM CONVERSION RATE
3-Channel Mode with CDS
30
2-Channel Mode with CDS
30
1-Channel Mode with CDS
18
ACCURACY (ENTIRE SIGNAL PATH)
ADC Resolution
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
No Missing Codes
16
± 16
± 0.5
Guaranteed
ANALOG INPUTS
Input Signal Range (Programmable)1
Allowable Reset Transient1
Input Limits2
Input Capacitance
Input Bias Current
AVSS – 0.3
2.0/4.0
1.0
10
10
AVDD + 0.3
AMPLIFIERS
PGA Gain
PGA Gain Resolution2
PGA Gain Monotonicity
Programmable Offset
Programmable Offset Resolution
Programmable Offset Monotonicity
1
–300
64
Guaranteed
512
Guaranteed
6
+300
NOISE AND CROSSTALK
Total Output Noise @ PGA Minimum
3.0
Total Output Noise @ PGA Maximum
9.0
Channel-to-Channel Crosstalk
@ 15 MSPS
70
@ 6 MSPS
90
POWER SUPPLY REJECTION
AVDD = 5 V Ϯ 0.25 V
0.1
DIFFERENTIAL VREF (at 25°C)
CAPT–CAPB
2.0
TEMPERATURE RANGE
Operating
Storage
–40
+85
–65
+150
POWER SUPPLIES
AVDD
DRVDD
4.75
5.0
5.25
3.0
5.0
5.25
OPERATING CURRENT
AVDD
75
DRVDD
5
Power-Down Mode
200
POWER DISSIPATION
3-Channel Mode
400
1-Channel Mode
300
NOTES
1Linear Input Signal Range is from 0 V to 4 V when the CCD’s reference level is clamped to 4 V by the AD9826’s input clamp.
Unit
MSPS
MSPS
MSPS
Bits
LSB
LSB
V p-p
V
V
pF
nA
V/V
Steps
mV
Steps
LSB rms
LSB rms
dB
dB
% FSR
V
°C
°C
V
V
mA
mA
μA
mW
mW
1V TYP
RESET TRANSIENT
4V SET BY INPUT CLAMP
(3V OPTION ALSO AVAILABLE)
4V p-p MAX INPUT SIGNAL RANGE
GND
2The PGA Gain is approximately “linear in dB” and follows the equation: Gain =
6.0
⎡63 – G ⎤ where G is the register value.
1 + 5.0 ⎣⎢ 63 ⎦⎥
Specifications subject to change without notice.
–2–
REV. B
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