AD9549(RevPrA) Просмотр технического описания (PDF) - Analog Devices
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AD9549 Datasheet PDF : 78 Pages
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Preliminary Technical Data
AD9549
AC SPECIFICATIONS
Unless otherwise noted: fS=1GHz. DAC RSET=10KΩ. Power supply pins within the range specified in “DC SPECIFICATIONS.”
Table 2.
Parameter
Min
Typ
Max
Unit Test Conditions/Comments
REFERENCE INPUTS
Pins 12, 13, 15, 16
Frequency Range
.008
750
MHz
Minimum Slew Rate
V/ns
Minimum Pulse Width High
ps
Minimum Pulse Width Low
ps
FDBK INPUT
Pins 40, 41
Input Frequency Range
MHz sinusoidal (without degrading phase
noise performance)
Minimum Slew Rate
Minimum Differential Input Level
V/ns
V
peak-to-peak (xxxdBm into 50Ω)
SYSTEM CLOCK INPUT
Pins 27, 28
SYSCLK PLL BYPASSED
Input Frequency Range
TBD
Minimum Pulse Width High
Minimum Pulse Width Low
Minimum Differential Input Level
1000
MHz
ps
ps
V
peak-to-peak (xxxdBm into 50Ω)
SYSCLK PLL ENABLED
VCO Frequency Range – Low Band
700
VCO Frequency Range – High Band
800
Maximum Input Rate of PFD
Without Bipolar Edge Detector
Input Frequency Range
TBD
Multiplication Range
8
Minimum Pulse Width High
Minimum Pulse Width Low
850
1000
100
TBD
66
MHz
MHz
MHz
MHz
integer multiples of 2
ps
ps
Minimum Differential Input Level
V
peak-to-peak (xxxdBm into 50Ω)
With Bipolar Edge Detector
Input Frequency Range
TBD
Multiplication Range
16
Input Duty Cycle
Minimum Differential Input Level
TBD
MHz
132
integer multiples of 4
%
V
peak-to-peak (xxxdBm into 50Ω)
CRYSTAL RESONATOR WITH SYSCLK PLL ENABLED
Crystal Resonator Frequency Range
Maximum Crystal Motional Resistance
10
40+
MHz fundamental mode resonator
TBD
see text for recommendations
Rev. PrA | Page 7 of 78
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