AD9284(Rev0) Просмотр технического описания (PDF) - Analog Devices
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AD9284 Datasheet PDF : 24 Pages
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AD9284
DIGITAL SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 1.0 V internal ADC reference, full temperature, unless otherwise noted.
Table 3.
Parameter1
CLOCK INPUTS (CLK+, CLK−)
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage2
Input Voltage Range
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance (Differential)
Input Capacitance
LOGIC INPUTS
CSB
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
SCLK, SDIO/PWDN, OE
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
DIGITAL OUTPUTS (D7+, D7− to D0+, D0−), LVDS
DRVDD = 1.8 V
Differential Output Voltage (VOD)
Output Offset Voltage (VOS)
Output Coding (Default)
Temperature Min
Full
Full
0.2
Full
AVDD − 0.3
Full
1.2
Full
0
Full
−10
Full
−10
25°C
25°C
Typ
LVDS/PECL
1.2
20
4
Max
Unit
6
AVDD + 1.6
3.6
0.8
+10
+10
V
V p-p
V
V
V
μA
μA
kΩ
pF
Full
1.2
DRVDD + 0.3 V
Full
0
0.8
V
Full
−5
−0.4
+5
μA
Full
−80
−63
−50
μA
25°C
30
kΩ
25°C
2
pF
Full
1.2
Full
0
Full
50
Full
−5
25°C
25°C
DRVDD + 0.3 V
0.8
V
57
70
μA
−0.4
+5
μA
30
kΩ
2
pF
Full
290
345
400
mV
Full
1.15
1.25
1.35
V
Offset binary
1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and an explanation of how these tests were
completed.
2 Specified for LVDS and LVPECL only.
Rev. 0 | Page 5 of 24
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