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AD9250 Просмотр технического описания (PDF) - Analog Devices

Номер в каталоге
Компоненты Описание
производитель
AD9250 Datasheet PDF : 45 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD9250
Parameter
SYSREF INPUT (SYSREF±)
Logic Compliance
Internal Common-Mode Bias
Differential Input Voltage Range
Input Voltage Range
Input Common-Mode Range
High Level Input Current
Low Level Input Current
Input Capacitance
Input Resistance
LOGIC INPUT (RST, CS)1
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
LOGIC INPUT (SCLK/PDWN)2
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
LOGIC INPUTS (SDIO)2
High Level Input Voltage
Low Level Input Voltage
High Level Input Current
Low Level Input Current
Input Resistance
Input Capacitance
DIGITAL OUTPUTS (SERDOUT0±/SERDOUT1±)
Logic Compliance
Differential Output Voltage (VOD)
Output Offset Voltage (VOS)
DIGITAL OUTPUTS (SDIO/FDA/FDB)
High Level Output Voltage (VOH)
IOH = 50 µA
IOH = 0.5 mA
Low Level Output Voltage (VOL)
IOL = 1.6 mA
IOL = 50 µA
1 Pull-up.
2 Pull-down.
Temperature
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Full
Min
0.3
AGND
0.9
−5
−5
8
1.22
0
−5
−100
1.22
0
45
−10
1.22
0
45
−10
400
0.75
Typ
LVDS
0.9
4
10
26
2
26
2
26
5
CML
600
DRVDD/2
Data Sheet
Max
Unit
3.6
AVDD
1.4
+5
+5
12
2.1
0.6
+5
−45
2.1
0.6
100
+10
2.1
0.6
100
10
V
V p-p
V
V
µA
µA
pF
kΩ
V
V
µA
µA
pF
V
V
µA
µA
pF
V
V
µA
µA
pF
750
mV p-p
1.05
V
1.79
V
1.75
V
0.2
V
0.05
V
Rev. E | Page 8 of 45

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