AD9238(RevA) Просмотр технического описания (PDF) - Analog Devices
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AD9238 Datasheet PDF : 24 Pages
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AD9238–SPECIFICATIONS
DC SPECIFICATIONS (AVDD = 3 V, DRVDD = 2.5 V, Maximum Sample Rate, CLK_A = CLK_B; AIN = –0.5 dBFS Differential Input,
1.0 V Internal Reference, TMIN to TMAX, unless otherwise noted.)
Parameter
Test AD9238BST-20 AD9238BST-40 AD9238BST-65
Temp Level Min Typ Max Min Typ Max Min Typ Max Unit
RESOLUTION
Full VI
ACCURACY
No Missing Codes Guaranteed
Offset Error
Gain Error1
Differential Nonlinearity (DNL)2
Integral Nonlinearity (INL)2
Full VI
Full VI
Full IV
Full V
25ЊC I
Full V
25ЊC I
TEMPERATURE DRIFT
Offset Error
Gain Error1
Full V
Full V
INTERNAL VOLTAGE REFERENCE
Output Voltage Error (1 V Mode) Full VI
Load Regulation @ 1.0 mA
Full V
Output Voltage Error (0.5 V Mode) Full V
Load Regulation @ 0.5 mA
Full V
INPUT REFERRED NOISE
Input Span = 1 V
Input Span = 2.0 V
25ЊC V
25ЊC V
ANALOG INPUT
Input Span = 1.0 V
Input Span = 2.0 V
Input Capacitance3
Full IV
Full IV
Full V
REFERENCE INPUT RESISTANCE Full V
POWER SUPPLIES
Supply Voltages
AVDD
DRVDD
Supply Current
IAVDD2
IDRVDD2
PSRR
Full IV
Full IV
Full V
Full V
Full V
POWER CONSUMPTION
DC Input4
Sine Wave Input2
Standby Power5
Full V
Full VI
Full V
MATCHING CHARACTERISTICS
Offset Error
Full V
Gain Error
Full V
12
12
12
Bits
12
12
12
Bits
±0.30 ±1.2
±0.50 ±1.1
±0.50 ±1.1 % FSR
±0.30 ±2.2
±0.50 ±2.4
±0.50 ±2.5 % FSR
±0.35
±0.35
±0.35
LSB
±0.35 ±0.9
±0.35 ±0.8
±0.35 ±1.0 LSB
±0.45
±0.60
±0.70
LSB
±0.40 ±1.4
±0.50 ±1.4
±0.55 ±1.75 LSB
±2
±2
±3
ppm/°C
±12
±12
±12
ppm/°C
±5 ±35
0.8
±2.5
0.1
±5 ±35
0.8
±2.5
0.1
±5 ±35 mV
0.8
mV
±2.5
mV
0.1
mV
0.54
0.54
0.54
LSB rms
0.27
0.27
0.27
LSB rms
1
1
1
V p-p
2
2
2
V p-p
7
7
7
pF
7
7
7
k⍀
2.7 3.0 3.6
2.25 3.0 3.6
60
4
±0.01
2.7 3.0 3.6
2.25 3.0 3.6
110
10
±0.01
2.7 3.0 3.6
2.25 3.0 3.6
200
14
±0.01
V
V
mA
mA
% FSR
180
190 212
2.0
330
360 397
2.0
600
mW
640 698 mW
2.0
mW
±0.1
±0.05
±0.1
±0.05
±0.1
±0.05
% FSR
% FSR
NOTES
1Gain error and gain temperature coefficient are based on the A/D converter only (with a fixed 1.0 V external reference).
2Measured at maximum clock rate with a low frequency sine wave input and approximately 5 pF loading on each output bit.
3Input capacitance refers to the effective capacitance between one differential input pin and AVSS. Refer to Figure 2 for the equivalent analog input structure.
4Measured with dc input at maximum clock rate.
5Standby power is measured with the CLK_A and CLK_B pins inactive (i.e., set to AVDD or AGND).
Specifications subject to change without notice.
–2–
REV. A
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