AD9216(RevA) Просмотр технического описания (PDF) - Analog Devices
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AD9216 Datasheet PDF : 40 Pages
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AD9216
SPECIFICATIONS
DC SPECIFICATIONS
AVDD = 3.0 V, DRVDD = 2.5 V, maximum sample rate, CLK_A = CLK_B; AIN = −0.5 dBFS differential input, 1.0 V internal reference,
TMIN to TMAX, DCS enabled, unless otherwise noted.
Table 1.
Parameter
RESOLUTION
ACCURACY
No Missing Codes
Offset Error
Gain Error1
Differential Nonlinearity (DNL)2
Integral Nonlinearity (INL)2
TEMPERATURE DRIFT
Offset Error
Gain Error1
Reference Voltage
INTERNAL VOLTAGE REFERENCE
Output Voltage Error
Load Regulation @ 1.0 mA
INPUT REFERRED NOISE
Input Span = 2.0 V
ANALOG INPUT
Input Span, VREF = 1.0 V
Input Capacitance3
REFERENCE INPUT RESISTANCE
POWER SUPPLIES
Supply Voltages
AVDD
DRVDD
Supply Current
IAVDD4
IDRVDD4
PSRR
POWER CONSUMPTION
PAVDD4
PDRVDD4
Standby Power5
MATCHING CHARACTERISTICS
Offset Matching Error6
Gain Matching Error (Shared Reference
Mode)
Gain Matching Error (Nonshared
Reference Mode)
Temp Test AD9216BCPZ-65 AD9216BCPZ-80 AD9216BCPZ-105
Level Min Typ Max Min Typ Max Min Typ Max Unit
Full VI
10
10
10
Bits
Full VI
Full VI
25°C VI
Full IV
25°C I
Full IV
25°C I
Guaranteed
-1.9 ±0.3 +1.9
-1.6 ±0.4 +1.6
-1.0 ±0.3 +1.0
-0.9 ±0.3 +0.9
-1.4 ±0.5 +1.4
-1.0 ±0.5 +1.0
Guaranteed
-1.9 ±0.3 +1.9
-1.6 ±0.4 +1.6
-1.0 ±0.4 +1.0
-0.9 ±0.4 +0.9
-1.6 ±0.5 +1.6
-1.1 ±0.5 +1.1
Guaranteed
−2.2 ±0.3 +2.2
−1.6 ±0.4 +1.6
−1.0 ±0.5 +1.0
−1.0 ±0.5 +1.0
−2.5 ±1.0 +2.5
−1.5 ±1.0 +1.5
% FSR
% FSR
LSB
LSB
LSB
LSB
Full V
±10
±10
Full V
±75
±75
Full V
±15
±15
±10
µV/°C
±75
ppm/°C
±15
ppm/°C
Full VI
25°C V
±2 ±35
1.0
±2 ±35
1.0
±2 ±35 mV
1.0
mV
25°C V
0.5
0.5
0.5
LSB rms
Full IV
2
2
25°C V
2
2
25°C V
7
7
2
V p-p
2
pF
7
kΩ
Full IV
Full IV
Full VI
Full VI
25°C V
25°C I
25°C V
25°C V
25°C I
25°C I
25°C I
2.7 3.0 3.3 2.7 3.0 3.3 2.7 3.0 3.3 V
2.25 2.5 3.3 2.25 2.5 3.3 2.25 2.5 3.3 V
72 80
15
±0.1
78 85
18
±0.1
100 110
24
±0.1
mA
mA
% FSR
216 240
38
3.0
234 255
45
3.0
300 330 mW
60
mW
3.0
mW
-2.6 ±0.2 +2.6 -2.6 ±0.2 +2.6 −3.5 ±0.3 +3.5 % FSR
-0.4 ±0.1 +0.4 -0.4 ±0.1 +0.4 −0.6 ±0.1 +0.6 % FSR
-1.6 ±0.1 +1.6 -1.6 ±0.1 +1.6 −1.6 ±0.3 +1.6 % FSR
1 Gain error and gain temperature coefficient are based on the ADC only (with a fixed 1.0 V external reference).
2 Measured with low frequency ramp at maximum clock rate.
3 Input capacitance refers to the effective capacitance between one differential input pin and AVSS. Refer to Figure 37 for the equivalent analog input structure.
4 Measured with low frequency analog input at maximum clock rate with approximately 5 pF loading on each output bit.
5 Standby power is measured with the CLK_A and CLK_B pins inactive (that is, set to AVDD or AGND).
6 Both shared reference mode and nonshared reference mode.
Rev. A | Page 3 of 40
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