AD9101 Просмотр технического описания (PDF) - Analog Devices
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AD9101 Datasheet PDF : 12 Pages
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AD9101
NOTES
1If the analog input exceeds ± 300 mV, the clock levels should be shifted as shown in the Theory of Operation section entitled “Driving the Encode Clock.”
2Time to recover within rated error band from 160% overdrive.
3Sampling bandwidth is defined as the –3 dB frequency response of the input sampler to the hold capacitor when operating in the sampling mode. It is greater than
tracking bandwidth because it does not include the bandwidth of the output amplifier.
4Hold mode noise is proportional to the length of time a signal is held. For example, if the hold time (t H) is 20 ns, the accumulated noise is typically 3 µV
(150 mV/s × 20 ns). This value must be combined with the track mode noise to obtain total noise.
5Total energy of worst case track-to-hold or hold-to-track glitch.
Specifications subject to change without notice.
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage (+VS) . . . . . . . . . . . . . . . . . . . . –0.5 V to +6 V
Supply Voltage (–VS) . . . . . . . . . . . . . . . . . . . . –6 V to +0.5 V
Analog Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . ± 5 V
CLOCK/CLOCK Input . . . . . . . . . . . . . . . . . –5 V to +0.5 V
Continuous Output Current4 . . . . . . . . . . . . . . . . . . . . 70 mA
Storage Temperature . . . . . . . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range
AE, AR . . . . . . . . . . . . . . . . . . . . . . . . . . . . –40°C to +85°C
SE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55°C to +125°C
Junction Temperature (Ceramic)2 . . . . . . . . . . . . . . . +175°C
Junction Temperature (Plastic)2 . . . . . . . . . . . . . . . . +150°C
Soldering Temperature (1 minute)3 . . . . . . . . . . . . . . +220°C
NOTES
1Absolute maximum ratings are limiting values to be applied individually, and
beyond which the serviceability of the circuit may be impaired. Functional
operability is not necessarily implied. Exposure to absolute maximum rating
conditions for an extended period of time may affect device reliability.
2Typical thermal impedances (no air flow, soldered to PC board) are as follows:
Ceramic LCC: θJA = 48°C/W; θJC = 9.9°C/W; Plastic SOIC: θJA = 54°C/W;
θJC = 7.3°C/W.
3For surface mount devices, mounted by vapor phase soldering. Prior to vapor phase
soldering, plastic units should receive a minimum eight hour bakeout at 110 °C to
drive off any moisture absorbed in plastic during shipping or storage. Through-hole
devices can be soldered at +300°C for 10 seconds.
4Output is short circuit protected to ground. Continuous short circuit may affect
device reliability.
EXPLANATION OF TEST LEVELS
Test Level
I – 100% production tested.
II – 100% production tested at +25°C, and sample tested at
specified temperatures.
III – Periodically sample tested.
IV – Parameter is guaranteed by design and characterization
testing.
V – Parameter is a typical value only.
VI – All devices are 100% production tested at +25°C. 100%
production tested at temperature extremes for extended
temperature devices; sample tested at temperature
extremes for commercial/industrial devices.
Model
AD9101AR
AD9101AE
AD9101SE
ORDERING INFORMATION
Temperature
Range
Package
Description
–40°C to +85°C
–40°C to +85°C
–55°C to +125°C
Plastic SOIC
LCC
LCC
Package
Option
R-20
E-20A
E-20A
Pin Description
Pin Description
Connection
1
RTN
2
RTN
3
CB+
4
+VS
5
+VS
6
GND
7
GND
8
+VS
9
+VS
10 CLK
11 CLK
12
–VS
13
–VS
14 N/C
15
VIN
16 GND
17
–VS
18
–VS
19
CB–
20
VOUT
Gain Set Resistor Return*
Gain Set Resistor Return*
Bootstrap Capacitor (Positive Bias)
+5 V Power Supply (Analog)
+5 V Power Supply (Analog)
Hold Capacitor Ground
Hold Capacitor Ground
+5 V Power Supply (Digital)
+5 V Power Supply (Digital)
True ECL T/H Clock
Complement ECL T/H Clock
–5.2 V Power Supply (Digital)
–5.2 V Power Supply (Digital)
No Connection
Analog Signal Input
Ground (Signal Return)
–5.2 V Power Supply (Analog)
–5.2 V Power Supply (Analog)
Bootstrap Capacitor (Negative Bias)
Analog Signal Output
*See “Matching the AD9101 to A/D Encoders.” Both pins should either be
grounded or connected to voltage source for offset.
PIN CONFIGURATIONS
20-Pin SOIC
20-Contact Ceramic LCC
RTN 1
RTN 2
20 VOUT
19 CB–
CB+ 3
18 –VS
+VS 4
17 –VS
+VS 5 AD9101 16 GND
TOP VIEW
GND 6 (Not to Scale) 15 VIN
GND 7
14 NC
+VS 8
+VS 9
13 –VS
12 –VS
CLK 10
11 CLK
19 20 1 2 3
–VS 18
–VS 17
GND 16
BOTTOM VIEW
4 +VS
5 +VS
6 GND
VIN 15
NC 14
7 GND
8 +VS
13 12 11 10 9
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9101 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
REV. 0
–3–
WARNING!
ESD SENSITIVE DEVICE
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