AD8316 Просмотр технического описания (PDF) - Analog Devices

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производитель

AD8316

Dual Output GSM PA Controller

Analog Devices 

AD8316

VOUT

AVERAGING = 16 SAMPLES

250ns

RISE TIME

10mV PER

VERTICAL

DIVISION

1␮s

RISE TIME

VPOS

INPUT

2V PER

VERTICAL DIVISION

2␮s PER HORIZONTAL DIVISION

TPC 31. Power-On and Power-Off Response with

VSET and ENBL Grounded

H-P 8648B

SIGNAL

GENERATOR

0.1GHz

–60dBm

RFOUT

AD811

H-P 8110A

PULSE

GENERATOR

PULSE OUT

49.9⍀

52.3⍀

CFLT

AD8316

RFIN VPOS

ENBL OUT1

VSET COMM

FLT1 OUT2

BSEL* FLT2

*BSEL HIGH OUT1;

BSEL LOW OUT2

732⍀

TEK P6204

FET PROBE

TEK P6204

FET PROBE

CFLT

RL

TEK 1103

1k⍀ PWR SUPPLY

TEK TDS3054

SCOPE

TPC 32. Test Setup for Power-On and Power-Off

Response with VSET and ENBL Grounded

GENERAL DESCRIPTION AND THEORY

The AD8316 is a wideband logarithmic amplifier (log amp) with

two selectable outputs suitable for dual-band/dual-mode power

amplifier control. It is strictly optimized for power control appli-

cations rather than for use as a measurement device. Figure 1

shows its main features in block schematic form. The output

pins, OUT1 and OUT2, are intended to be applied directly to

the automatic power control (APC) pins of two distinct power

amplifiers. When the band select pin, BSEL, directs one of the

controller outputs to servo its amplifier toward the setpoint

indicated by the power control pin VSET, the other output is

forced to ground, disabling the second amplifier. Each output

has a dedicated filter pin, FLT1 and FLT2, that allows the

filtering and loop dynamics for each control loop to be opti-

mized independently.

Basic Theory

Logarithmic amplifiers provide a type of compression in which a

signal with a large range of amplitudes is converted to one of

a smaller range. The use of the logarithmic function uniquely

results in the output representing the decibel value of the input.

The fundamental mathematical form is

VOUT

= VSLP

log VIN

VZ

(1)

Here VIN is the input voltage and VZ is called the intercept (volt-

age) because when VIN = VZ the argument of the logarithm is

unity, and thus the result is zero; VSLP is called the slope (volt-

age), which is the amount by which the output changes for a

certain change in the ratio (VIN/VZ).

Because log amps do not respond to power, but only to voltages,

and the calibration of the intercept is waveform dependent and

only quoted for a sine wave signal, the equivalent power response

can be written as

VOUT = VDB (PIN – PZ )

(2)

where the input power PIN and the equivalent intercept PZ are

both expressed in dBm (thus, the quantity in the parentheses is

simply a number of decibels), and VDB is the slope expressed as

so many mV/dB. When base 10 logarithms are used, denoted by

the function log10, VSLP represents V/dec, and since a decade

corresponds to 20 dB, VSLP/20 represents the change in V/dB. For

the AD8316, a nominal (low frequency) slope of 22 mV/dB

(corresponding to a VSLP of 0.022 mV/dB × 20 dB = 440 mV)

was chosen, and the intercept VZ was placed at the equivalent of

–74 dBV, or 199 µV rms, for a sine wave input. This corre-

sponds to a power level of –61 dBm when the net resistive part

of the input impedance of the log amp is 50 Ω. However, both

the slope and the intercept are dependent on frequency (see for

example, TPC 13 and TPC 16).

For a log amp with a slope VDB of +22 mV/dB and an inter-

cept at –61 dBm, the output voltage for an input power of

–30 dBm is 0.022 × (–30 – [–61]) = 0.682 V.

REV. C

VPOS

ENBL

BSEL

RFIN

COMM

LOW NOISE

GAIN BIAS

LOW NOISE

BAND GAP

REFERENCE

OUTPUT

ENABLE

DELAY

DET

DET

DET

DET

DET

10dB

10dB

10dB

10dB

HI-Z

؋1.35

HI-Z

؋1.35

OFFSET

COMPENSATION

INTERCEPT

POSITIONING

V–I

Figure 1. Block Schematic of the AD8316

–9–

FLT1

OUT1

LOW NOISE

RAIL-TO-RAIL

BUFFERS

OUT2

FLT2

VSET

325mV TO

1.4V = 49dB

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