AD7994-0 Просмотр технического описания (PDF) - Analog Devices
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AD7994-0 Datasheet PDF : 32 Pages
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AD7993/AD7994
PIN CONFIGURATION AND PIN FUNCTION DESCRIPTIONS
AGND
AGND
AGND
AGND
VDD
REFIN
VIN1
VIN3
1
16 AGND
2 AD7993/ 15 SCL
3 AD7994 14 SDA
4 TOP VIEW 13 ALERT/BUSY
5 (Not to Scale) 12 CONVST
6
11 AS
7
10 VIN2
8
9 VIN4
Figure 3. 16-Lead TSSOP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic Function
1, 2, 3, 4, 16 AGND
Analog Ground. Ground reference point for all circuitry on the AD7993/AD7994. All analog input signals
should be referred to this AGND voltage.
5
VDD
Power Supply Input. The VDD range for the AD7993/AD7994 is from 2.7 V to 5.5 V.
6
REFIN
Voltage Reference Input. The external reference for the AD7993/AD7994 should be applied to this input pin.
The voltage range for the external reference is 1.2 V to VDD. A 0.1 µF and 1 µF capacitor should be placed
between REFIN and AGND. See Figure 22.
7
VIN1
Analog Input 1. Single-ended analog input channel. The input range is 0 V to REFIN.
8
VIN3
Analog Input 3. Single-ended analog input channel. The input range is 0 V to REFIN.
9
VIN4
Analog Input 4. Single-ended analog input channel. The input range is 0 V to REFIN.
10
VIN2
Analog Input 2. Single-ended analog input channel. The input range is 0 V to REFIN.
11
AS
Logic Input. Address select input that selects one of three I2C addresses for the AD7993/AD7994, as shown in
Table 6. The device address depends on the voltage applied to this pin.
12
CONVST
Logic Input Signal/Convert Start Signal. This is an edge-triggered logic input. The rising edge of this signal
powers up the part. The power-up time for the part is 1 µs. The falling edge of CONVST places the track/hold
into hold mode and initiates a conversion. A power-up time of at least 1 µs must be allowed for the CONVST
high pulse; otherwise, the conversion result is invalid (see the Modes of Operation section).
13
ALERT/BUSY Digital Output, Selectable as an ALERT or BUSY Output Function. When configured as an ALERT, this pin acts
as an out-of-range indicator and, if enabled, becomes active when the conversion result violates the DATAHIGH
or DATALOW register values. See the Limit Registers section. When configured as a BUSY output, this pin
becomes active when a conversion is in progress. Open-drain output.
14
SDA
Digital I/O. Serial bus bidirectional data. Open-drain output. External pull-up resistor required.
15
SCL
Digital Input. Serial bus clock. External pull-up resistor required.
Table 6. I2C Address Selection
Part Number
AD7993-0
AD7993-0
AD7993-1
AD7993-1
AD7993-x1
AD7994-0
AD7994-0
AD7994-1
AD7994-1
AD7994-x
1
AS Pin
GND
VDD
GND
VDD
Float
GND
VDD
GND
VDD
Float
I2C Address
010 0001
010 0010
010 0011
010 0100
010 0000
010 0001
010 0010
010 0011
010 0100
010 0000
1 If the AS pin is left floating on any of the AD7993/AD7994 parts, the device address is 010 0000.
Rev. 0 | Page 10 of 32
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